SH7021 datasheet(242/509 Pages) RENESAS

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10.2.2

Timer Synchro Register (TSNC)

The timer synchro register (TSNC) is an eight-bit read/write register that selects timer

synchronizing modes for channels 0–4. Channels for which 1 is set to the corresponding bit will be

synchronized. TSNC is initialized to H'E0 or H'60 upon reset or standby mode.

Bit:

Bit name:

——

—

SYNC4

SYNC3

SYNC2

SYNC1

SYNC0

Initial value:

R/W:

——

—

R/W

Note:

Undefined

•

Bits 7–5 (reserved): Bit 7 is read as undefined. Bits 6 and 5 are always read as 1. The write

value to bit 7 should be 0 or 1, and the write value to bits 6 and 5 should always be 1.

•

Bit 4 (timer synchro 4 (SYNC4)): SYNC4 selects the synchronizing mode for channel 4.

Bit 4: SYNC4

Description

The timer counter for channel 4 (TCNT4) operates independently

(Preset/clear of TCNT4 is independent of other channels) (initial value)

Channel 4 operates synchronously. Synchronized preset/clear of

TNCT4 enabled.

•

Bit 3 (timer Synchro 3 (SYNC3)): SYNC3 selects the synchronizing mode for channel 3.

Bit 3: SYNC3

Description

The timer counter for channel 3 (TCNT3) operates independently

(Preset/clear of TCNT3 is independent of other channels) (initial value)

Channel 3 operates synchronously. Synchronized preset/clear of

TNCT3 enabled.

•

Bit 2 (timer synchro 2 (SYNC2)): SYNC2 selects the synchronizing mode for channel 2.

Bit 2: SYNC2

Description

The timer counter for channel 2 (TCNT2) operates independently

(Preset/clear of TCNT2 is independent of other channels) (initial value)

Channel 2 operates synchronously. Synchronized preset/clear of

TNCT2 enabled.

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