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R8C/15 Datasheet(PDF) 145 Page - Renesas Technology Corp |
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R8C/15 Datasheet(HTML) 145 Page - Renesas Technology Corp |
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145 / 277 page ![]() R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 133 of 253 REJ09B0164-0210 14.1.1 Polarity Select Function Figure 14.7 shows the Transfer Clock Polarity. Use the CKPOL bit in the U0C0 register to select the transfer clock polarity. Figure 14.7 Transfer Clock Polarity 14.1.2 LSB First/MSB First Select Function Figure 14.8 shows the Transfer Format. Use the UFORM bit in the U0C0 register to select the transfer format. Figure 14.8 Transfer Format CLK0(1) D0 TXD0 • When the CKPOL bit in the U0C0 register = 0 (output transmit data at the falling edge and input the receive data at the rising edge of the transfer clock) D1 D2 NOTES : 1. When not transferring, the CLK0 pin level is “H”. 2. When not transferring, the CLK0 pin level is “L”. D3 D4 D5 D6 D7 D0 RXD0 D1 D2 D3 D4 D5 D6 D7 CLK0(2) D0 TXD0 D1 D2 D3 D4 D5 D6 D7 D0 RXD0 D1 D2 D3 D4 D5 D6 D7 • When the CKPOL bit in the U0C0 register = 1 (output transmit data at the rising edge and input the receive data at the falling edge of the transfer clock) CLK0 D0 TXD0 • When UFORM bit in U0C0 register = 0 (LSB first)(1) D1 D2 D3 D4 D5 D6 D7 D0 RXD0 D1 D2 D3 D4 D5 D6 D7 CLK0 D7 TXD0 D6 D5 D4 D3 D2 D1 D0 RXD0 • When UFORM bit in U0C0 register = 1 (MSB first)(1) NOTES : 1. The above applies when the CKPOL bit in the U0C0 register is set to "0" (output transmit data at the falling edge and input receive data at the rising edge of the transfer clock). D7 D6 D5 D4 D3 D2 D1 D0 |
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