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R8C/15 Datasheet(PDF) 148 Page - Renesas Technology Corp |
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R8C/15 Datasheet(HTML) 148 Page - Renesas Technology Corp |
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148 / 277 page ![]() R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 136 of 253 REJ09B0164-0210 NOTES: 1. The bits used for transmit/receive data are as follows: Bits 0 to 6 when transfer data is 7-bit long; bits 0 to 7 when transfer data is 8-bit long; bits 0 to 8 when transfer data is 9-bit long. Table 14.6 lists the I/O Pin Functions in Clock Asynchronous Serial I/O Mode. After the UART0 operating mode is selected, the TXD0 pin outputs “H” level (If the NCH bit is set to “1” (N-channel open-drain outputs), this pin is in a high-impedance state) until transfer starts. Table 14.5 Registers to Be Used and Settings in UART Mode Register Bit Function U0TB 0 to 8 Set transmit data(1) U0RB 0 to 8 Receive data can be read(1) OER,FER,PER,SUM Error flag U0BRG 0 to 7 Set a bit rate U0MR SMD2 to SMD0 Set to “100b” when transfer data is 7-bit long Set to “101b” when transfer data is 8-bit long Set to “110b” when transfer data is 9-bit long CKDIR Select the internal clock or external clock STPS Select the stop bit PRY, PRYE Select whether parity is included and odd or even U0C0 CLK0, CLK1 Select the count source for the U0BRG register TXEPT Transmit register empty flag NCH Select TXD0 pin output mode CKPOL Set to “0” UFORM LSB first or MSB first can be selected when transfer data is 8-bit long. Set to “0” when transfer data is 7- or 9-bit long. U0C1 TE Set to “1” to enable transmit TI Transmit buffer empty flag RE Set to “1” to enable receive RI Receive complete flag UCON U0IRS, U1IRS Select the factor of UART0 transmit interrupt U0RRM Set to “0” CNTRSEL Set to “1” to select P1_5/RXD0/CNTR01/INT11 Table 14.6 I/O Pin Functions in Clock Asynchronous Serial I/O Mode Pin name Function Selection Method TXD0(P1_4) Output serial data (Cannot be used as a port when performing receive only) RXD0(P1_5) Input serial data PD1_5 bit in PD1 register=0 (P1_5 can be used as an input port when performing transmit only) CLK0(P1_6) Programmable I/O Port CKDIR bit in U0MR register=0 Input transfer clock CKDIR bit in U0MR register=1 PD1_6 bit in PD1 register=0 |
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