R8CSLASH15 datasheet(151/277 Pages) RENESAS

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R8C/14 Group, R8C/15 Group

14. Serial Interface

Rev.2.10

Jan 19, 2006

Page 139 of 253

REJ09B0164-0210

14.2.2

Bit Rate

Divided-by-16 of frequency by the U0BRG register in UART mode is a bit rate.

Figure 14.11

Calculation Formula of U0BRG Register Setting Value

Table 14.7

Bit Rate Setting Example in UART Mode

Bit Rate

(bps)

BRG

Count

Source

System Clock = 20MHz

System Clock = 8MHz

BRG Setting

Value

Actual Time

(bps)

Error(%)

BRG Setting

Value

Actual

Time (bps)

Error(%)

1200

129(81h)

1201.92

0.16

51(33h)

1201.92

0.16

2400

64(40h)

2403.85

0.16

25(19h)

2403.85

0.16

4800

32(20h)

4734.85

-1.36

12(0Ch)

4807.69

0.16

9600

129(81h)

9615.38

0.16

51(33h)

9615.38

0.16

14400

86(56h)

14367.82

-0.22

34(22h)

14285.71

-0.79

19200

64(40h)

19230.77

0.16

25(19h)

19230.77

0.16

28800

42(2Ah)

29069.77

0.94

16(10h)

29411.76

2.12

31250

39(27h)

31250.00

0.00

15(0Fh)

31250.00

0.00

38400

32(20h)

37878.79

-1.36

12(0Ch)

38461.54

0.16

51200

23(17h)

52083.33

1.73

9(09h)

50000.00

-2.34

• When selecting internal clock

Setting value to the U0BRG register =

Bit Rate

× 16

- 1

Fj : Count source frequency of the U0BRG register (f1, f8 and f32)

• When selecting external clock

fEXT

Bit Rate

× 16

- 1

fEXT : Count source frequency of the U0BRG register (external clock)

Setting value to the U0BRG register =

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