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R8C/15 Datasheet(PDF) 150 Page - Renesas Technology Corp |
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R8C/15 Datasheet(HTML) 150 Page - Renesas Technology Corp |
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150 / 277 page ![]() R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 138 of 253 REJ09B0164-0210 Figure 14.10 Receive Timing in UART Mode 14.2.1 CNTR0 Pin Select Function The CNTRSEL bit in the UCON register selects whether P1_7 can be used as the CNTR00/INT10 input pin or P1_5 can be used as the CNTR01/INT11 input pin. When the CNTRSEL bit is set to “0”, P1_7 is used as the CNTR00/INT10 pin and when the CNTRSEL bit is set to “1”, P1_5 is used as the CNTR01/INT11 pin. U0BRG output Set to "0" when interrupt request is accepted, or set by a program • Example of receive timing when transfer data is 8 bits long (parity disabled, one stop bit) The above timing diagram applies to the following conditions. • PRYE bit in U0MR register = 0 (parity disabled) • STPS bit in U0MR register = 0 (1 stop bit) U0C1 register RE bit Start bit Stop bit D0 D1 D7 RXD0 Transfer clock Sampled "L" Receive data taken in Reception triggered when transfer clock is generated by falling edge of start bit Transferred from UART0 receive register to U0RB register U0C1 register RI bit S0RIC register RI bit "1" "0" "1" "0" "1" "0" |
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