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7477 Datasheet(PDF) 126 Page - Renesas Technology Corp

Part # 7477
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  361 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7477 Datasheet(HTML) 126 Page - Renesas Technology Corp

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1-119
7470/7471/7477/7478 GROUP USER’S MANUAL
HARDWARE
1.13 Serial I/O
2
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2
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2 Transmit operation of UART
The Transmit operation of the UART is described below.
q Start of Transmit operation
Transmit data is transmitted by writing it into the Transmit buffer register (TB: address 00E016) in
the Transmit enable state.V1
q Transmit operation
1 After transmit data is written into the Transmit buffer register, the transmit buffer empty flag (bit
0) of the Serial I/O status register is cleared to “0.”
2 The transmit data written in the Transmit buffer register is transferred to the Transmit shift
register. When the data transfer from the Transmit buffer register to the Transmit shift register
is completed, the transmit buffer empty flag is set to “1.”V2
When the transmit interrupt source bit (bit 3) of the Serial I/O control register (SIOCON) is “0,”
the interrupt request bit is set to “1,” then a transmit interrupt request occurs.
3 The transmit data transferred to the transmit shift register is output from the P15/TxD pin in
synchronization with the fall of the synchronous clock starting with the start bit. The start bit,
the parity bit and the stop bit are automatically generated and output according to the contents
of setting of the UART control register.
4 When a transmit shift operation is started, the transmit shift completion flag (b2) of the Serial
I/O status register is cleared to “0.”
5 Data is output starting with the least significant bit of the Transmit shift register. Each time one-
bit data is output, the contents of the Transmit shift register are shifted by 1 bit in the direction
of the least significant bit.
6 After one-half a cycle of the synchronous clockV3 after a start of stop bit transmission, the
transmit shift completion flag is set to “1.”
When the bit 3 of the Serial I/O control register is “1” (transmit shift operation is completed),
at the time the interrupt request bit is set to “1” and the Transmit interrupt request occurs.
V1: Status in which the register for transmit operation has been completed. Refer to the “[UART
transmit setting method]” which will be described later.
V2: While the transmit buffer empty flag is “1,” the next transmit data can be written into the
Transmit buffer register.
V3: In case of two stop bits, the stop bit output period is that of the 2nd bit.



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