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7480 Datasheet(PDF) 67 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 67 Page - Renesas Technology Corp |
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67 / 337 page  7480 Group and 7481 Group User's Manual 1-50 HARDWARE 1.11 Interrupts Figure 1.11.8 shows an operation when an interrupt request is accepted. Figure 1.11.8 Operation When Interrupt Request is Accepted Stack area PCL PCH S PS b0 b7 Interrupt disable flag Break flag Note M(S) ←(PCH) (S) ←(S)–1 (S) ←(S)–1 M(S) ←(PS) M(S) ←(PCL) (S) ←(S)+1 (PCL) ←M(S) (PS) ←M(S) (S) ←(S)+1 (S) ←(S)–1 (PCH) ←M(S) (S) ←(S)+1 Routine being executed RTI instruction execution Interrupt service routine Contents of program counter are pushed onto stack Processing at accepting interrupt Note: In the case of the BRK instruction interrupt, b4 of PS is set to ‘1’. Interrupt disable flag ‘0’ →‘1’ Fetch the jump address stored into vector address Contents of processor status register are pulled from stack Contents of program counter are pulled from stack 1 Interrupt request is generated 3 2 Stack area PCL PCH S PS (S)=XXS Immediately after interrupt request is accepted XXS XXPCH XXPCL 1 b0 b7 Interrupt disable flag Break flag Immediately after system returns from interrupt service routine 3 XXS Immediately before interrupt service routine is executed Jump address (from vector address) XXPCH XXPCL XXS–3 (S)=XXS–3 2 (PCL) (PCH) (PS) : Operation performed by software : Operation automatically performed by hardware Contents of processor status register are pushed onto stack • • • • • • • • • • • • Note 0 1 Note 0 Stack area PCL PCH S PS (S)=XXS XXS XXPCH XXPCL b0 b7 Interrupt disable flag Break flag Note 0 |
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