7480 datasheet(77/337 Pages) RENESAS

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1.12 Timer X and Timer Y

HARDWARE

7480 Group and 7481 Group User's Manual

(1) Timer X and Timer Y

These are the 16-bit registers that count the count sources.

• When the timer X or Y write control bit of the timer X or Y mode register is;

‘0’: data is written to the timer and the timer latch (Note), and

‘1’: data is written to the timer latch only.

• In the pulse width measurement mode or the pulse period measurement mode, a read from the

timer receives the contents of the timer latch.

In the other modes, it receives the contents of the timer.

Note: The timer latches are the registers that hold the initial values automatically reloaded to the

timers when they underflow, and they hold the measured values of pulse periods or widths.

The timer latches cannot directly be read.

Figures 1.12.3 and 1.12.4 show the timer X and timer Y.

Figure 1.12.3 Timer X

Timer X (Timer X latch)

b4 b3 b2 b1 b0

Function

At reset

Timer X (high-order) (TXH) [Address 00F116]

b4 b3 b2 b1 b0

Timer X (low-order) (TXL) [Address 00F016]

The low-order count value of

timer X is indicated.

Function

At reset

The high-order count value of

timer X is indicated.

Notes 1: Do not write to these bits in pulse period measurement mode or pulse width measurement mode.

2: When b3 of timer X mode register is ‘0’, writing to latch and timer is simultaneously

performed. When b3 is ‘1’, writing to only latch is performed.

3: When reading/writing from/to timer X, read/write from/to both high-order and low-order

bytes. At reading, read the high-order byte and the low-order byte in this order.

At writing, write the low-order byte and the high-order byte in this order.

Note 1

7480 Datasheet(PDF) 77 Page - Renesas Technology Corp