 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
7480 Datasheet(PDF) 75 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
7480 Datasheet(HTML) 75 Page - Renesas Technology Corp |
|
|
75 / 337 page  1-58 1.12 Timer X and Timer Y HARDWARE 7480 Group and 7481 Group User's Manual Figure 1.12.1 Block Diagram of Timer X and Timer Y Timer X (low-order) latch Timer X (high-order) latch Timer X (low-order) PWM mode Pulse output mode Port P40 latch Programmable waveform generation mode f(XIN)/2 f(XIN)/8 f(XIN)/16 Data bus Q T S Q Edge detection circuit DQ T P40/CNTR0 edge selection bit CNTR0 edge selection bit CNTR0 Pulse output mode Programmable one-shot output mode DQ T Timer X operating mode bits Port P40 direction register Programmable one-shot output mode P30/INT0 PWM mode Output level latch Programmable waveform generation mode Timer X trigger selection bit Timer X stop control bit edge selection bit CNTR0 interrupt request INT0 interrupt request Timer X interrupt request CNTR0 Programmable one-shot output circuit PWM generation circuit ‘001’ ‘101’ ‘110’ ‘100’ Pulse width measurement mode Pulse period measurement mode Timer Y (low-order) latch Timer Y (low-order) PWM mode Pulse output mode latch Programmable waveform generation mode f(XIN)/2 f(XIN)/8 f(XIN)/16 Q T S Q DQ T P41/CNTR1 edge selection bit CNTR1 edge selection bit CNTR1 Pulse output mode Programmable one-shot output mode DQ T Timer Y operating mode bits direction register P31/INT1 edge selection bit CNTR1 interrupt request INT1 Timer Y interrupt request interrupt request CNTR1 Timer X count source selection bits Timer Y count source selection bits edge selection bit INT0 edge selection bit INT1 Programmable one-shot output mode PWM mode Output level latch Programmable waveform generation mode Timer Y trigger selection bit Timer Y stop control bit Pulse width measurement mode Pulse period measurement mode Timer X (high-order) Timer Y (high-order) latch Timer Y (high-order) ‘0’ ‘1’ Programmable one-shot output circuit PWM generation circuit ‘001’ ‘101’ ‘110’ ‘100’ ‘0’ ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ ‘1’ ‘0’ Port P41 Port P41 Edge detection circuit |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
