7480 datasheet(70/337 Pages) RENESAS

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7480 Group and 7481 Group User's Manual

1-53

HARDWARE

1.11 Interrupts

1.11.5 Interrupt Control

Figure 1.11.11 shows an interrupt control diagram.

Figure 1.11.11 Interrupt Control Diagram

Only when all of the following conditions are satisfied, interrupts other than the BRK instruction interrupt

are accepted:

• Corresponding interrupt request bit is ‘1’ (interrupt requested).

• Corresponding interrupt enable bit is ‘1’ (interrupt enabled).

• Interrupt disable flag is ‘0’ (interrupt enabled).

The priority level of each interrupt is specified by hardware. However, processing of various priorities can

be performed under software control by using the above bits and flag.

For the interrupt priority levels, refer to Table 1.11.1 Interrupt Sources.

Interrupt Request Bits

The interrupt request bits indicate whether or not there are interrupt requests. When an interrupt request

is generated, an interrupt request bit is set to ‘1’ and informs the external that the interrupt request is

generated. After the interrupt is accepted, the interrupt request bit is automatically cleared to ‘0’.

The interrupt request bits can be cleared to ‘0’ by software, but they cannot be set to ‘1’.

Interrupt Enable Bits

The interrupt enable bits control the acceptance of interrupt requests as follows:

• When an interrupt enable bit is ‘0’, the acceptance of the corresponding interrupt request is disabled.

• When an interrupt enable bit is ‘1’, the acceptance of the corresponding interrupt request is enabled.

Interrupt Disable Flag

This flag is located in the processor status register. The flag controls the acceptance of the interrupt

requests other than the BRK instruction interrupt as follows:

• When the interrupt disable flag is ‘0’, the acceptance of interrupt request is enabled.

• When the interrupt disable flag is ‘1’, the acceptance of interrupt request is disabled.

When the program branches to the interrupt service routine, this flag is automatically set to ‘1’ and disables

multiple interrupts. When multiple interrupts are used, clear this flag to ‘0’ at the start of the interrupt

service routine.

Interrupt request bit

Interrupt enable bit

Interrupt disable flag

BRK instruction

Reset

Interrupt acceptance

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