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7480 Datasheet(PDF) 15 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 15 Page - Renesas Technology Corp |
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15 / 337 page ![]() List of Figures v 7480 Group and 7481 Group User’s Manual Figure 2.3.1 Connection Example ............................................................................................. 2-20 Figure 2.3.2 Setting Example of Synchronous Clock ............................................................. 2-20 Figure 2.3.3 Timing of Interrupt Control ................................................................................... 2-21 Figure 2.3.4 Control Procedure Example of Serial I/O Transmit .......................................... 2-21 Figure 2.3.5 Connection Example ............................................................................................. 2-22 Figure 2.3.6 Setting Example of Synchronous Clock ............................................................. 2-22 Figure 2.3.7 Communication Format ......................................................................................... 2-22 Figure 2.3.8 Control Procedure Example of Serial I/O Receive ........................................... 2-23 Figure 2.3.9 Connection Example ............................................................................................. 2-24 Figure 2.3.10 Setting Example of Synchronous Clock ........................................................... 2-24 Figure 2.3.11 Communication Format Example of Simplified SAE J1850 ........................... 2-25 Figure 2.3.12 Communication Timing Example ....................................................................... 2-26 Figure 2.3.13 Control Procedure Example (1) of LAN Communications .............................. 2-27 Figure 2.3.14 Control Procedure Example (2) of LAN Communications .............................. 2-28 Figure 2.4.1 Example of Determining A-D Conversion Values .............................................. 2-30 Figure 2.4.2 Control Procedure Example of Determining A-D Conversion Values ............. 2-31 Figure 2.5.1 Reset Circuit Examples ........................................................................................ 2-32 Figure 2.6.1 Oscillation Circuit Example with Ceramic Resonator ........................................ 2-33 Figure 2.6.2 External Clock Circuit Example ........................................................................... 2-33 Figure 2.7.1 Connection Example ............................................................................................. 2-34 Figure 2.7.2 Operation Example in Key-Input Waiting State ................................................. 2-34 Figure 2.7.3 Control Procedure Example of Power-Saving in Key-Input Waiting State.... 2-35 Figure 2.7.4 Connection Example ............................................................................................. 2-36 Figure 2.7.5 Operation Example in Serial I/O Receive Waiting State.................................. 2-36 Figure 2.7.6 Control Procedure Example of Power-Saving ................................................... 2-37 Figure 2.8.1 Wiring for RESET Pin ........................................................................................... 2-38 Figure 2.8.2 Wiring for Clock I/O Pins ..................................................................................... 2-39 Figure 2.8.3 Wiring for VPP Pin of One Time PROM and EPROM Version ....................... 2-39 Figure 2.8.4 Bypass Capacitor across VSS Line and VCC Line ............................................ 2-40 Figure 2.8.5 Bypass Capacitor across VSS Line and VREF Line .......................................... 2-40 Figure 2.8.6 Analog Signal Line and Resistor and Capacitor ............................................... 2-40 Figure 2.8.7 Wiring for Large Current Signal Line ................................................................ 2-41 Figure 2.8.8 Wiring to Signal Line Where Potential Levels Change Frequently ................. 2-41 Figure 2.8.9 VSS Patterns on Underside of Oscillator ............................................................ 2-41 Figure 2.8.10 Setup For I/O Ports ........................................................................................... 2-42 Figure 2.8.11 Watchdog Timer by Software ............................................................................ 2-43 Figure 2.9.1 Initialization of Flags in PS .................................................................................. 2-44 Figure 2.9.2 Stack Memory Contents after PHP Instruction Execution ................................ 2-44 Figure 2.9.3 PLP Instruction Execution .................................................................................... 2-44 Figure 2.9.4 Execution of Decimal Operation .......................................................................... 2-45 Figure 2.11.1 Application Circuit to Hot-Water Supply Equipment ....................................... 2-48 Figure 2.11.2 Application Circuit to Motorcycle Single-Cylinder Engine .............................. 2-49 |
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