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TMS370 Datasheet(PDF) 54 Page - Texas Instruments |
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TMS370 Datasheet(HTML) 54 Page - Texas Instruments |
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54 / 73 page  TMS370Cx6x 8-BIT MICROCONTROLLER SPNS033C – SEPTEMBER 1995 – REVISED FEBRUARY 1997 54 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Table 24. Peripheral File Frame Compilation (Continued) PF BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REG Mode: Dual-Compare P06B T2AEDGE1 INT FLAG T2AC2 INT FLAG T2AC1 INT FLAG — — T2AEDGE1 INT ENA T2AC2 INT ENA T2AC1 INT ENA T2ACTL2 P06C T2A MODE = 0 T2AC1 OUT ENA T2AC2 OUT ENA T2AC1 RST ENA T2AEDGE1 OUT ENA T2AEDGE1 POLARITY T2AEDGE1 RST ENA T2AEDGE1 DET ENA T2ACTL3 Mode: Dual-Capture P06B T2AEDGE1 INT FLAG T2AEDGE2 INT FLAG T2AC1 INT FLAG — — T2AEDGE1 INT ENA T2AEDGE2 INT ENA T2AC1 INT ENA T2ACTL2 P06C T2A MODE = 1 — — T2AC1 RST ENA T2AEDGE2 POLARITY T2AEDGE1 POLARITY T2AEDGE2 DET ENA T2AEDGE1 DET ENA T2ACTL3 Modes: Dual-Compare and Dual-Capture P06D — — — — T2AEVT DATA IN T2AEVT DATA OUT T2AEVT FUNCTION T2AEVT DATA DIR T2APC1 P06E T2AIC2 / PWM DATA IN T2AIC2 / PWM DATA OUT T2AIC2 / PWM FUNCTION T2AIC2 / PWM DATA DIR T2AIC1/CR DATA IN T2AIC1/CR DATA OUT T2AIC1/CR FUNCTION T2AIC1/CR DATA DIR T2APC2 P06F T2A STEST T2A PRIORITY — — — — — — T2APRI Analog-To-Digital Converter 1 Control Registers P070 CONVERT START SAMPLE START REF VOLT SELECT2 REF VOLT SELECT1 REF VOLT SELECT0 AD INPUT SELECT2 AD INPUT SELECT1 AD INPUT SELECT0 ADCTL P071 — — — — — AD READY AD INT FLAG AD INT ENA ADSTAT P072 A-to-D Conversion Data Register ADDATA P073 to P07C Reserved P07D Port E Data Input Register ADIN P07E Port E Input Enable Register ADENA P07F AD STEST AD PRIORITY AD ESPEN — — — — — ADPRI Timer 2B Control Registers Memory Map Modes: Dual-Compare and Dual-Capture P080 BIT 15 T2B Counter MSbyte BIT 8 T2BCNTR P081 BIT 7 T2B Counter LSbyte BIT 0 T2BCNTR P082 BIT 15 Compare Register MSbyte BIT 8 T2BC P083 BIT 7 Compare Register LSbyte BIT 0 T2BC P084 BIT 15 Capture/Compare Register MSbyte BIT 8 T2BCC P085 BIT 7 Capture/Compare Register LSbyte BIT 0 T2BCC P086 BIT 15 Capture Register 2 MSbyte BIT 8 T2BIC P087 BIT 7 Capture Register 2 LSbyte BIT 0 T2BIC P08A — — — T2B OVRFL INT ENA T2B OVRFL INT FLAG T2B INPUT SELECT1 T2B INPUT SELECT0 T2B SW RESET T2BCTL1 |
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