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TMS370 Datasheet(PDF) 18 Page - Texas Instruments

Part # TMS370
Description  8-BIT MICROCONTROLLER
PDF  73 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS370 Datasheet(HTML) 18 Page - Texas Instruments

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TMS370Cx6x
8-BIT MICROCONTROLLER
SPNS033C – SEPTEMBER 1995 – REVISED FEBRUARY 1997
18
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
interrupts (continued)
SCI INT
RX
BRKDT
RXRDY
TX
TXRDY
TXPRI
RXPRI
TIMER 2A
CPU
NMI
Logic
Enable
IE1
IE2
Level 1 INT
Level 2 INT
T2A PRI
Priority
Overflow
Compare1
Ext Edge
Compare2
Input Capture 1
Input Capture 2
EXT INT 3
INT3 PRI
INT 3
STATUS REG
EXT INT1
INT1 PRI
INT1
SPI INT
SPI PRI
SPI
EXT INT 2
INT2 PRI
INT 2
AD INT
AD PRI
A/D
TIMER 1
T1 PRI
Overflow
Compare1
Ext Edge
Compare2
Input Capture 1
Watchdog
TIMER 2B
T2B PRI
Overflow
Compare1
Ext Edge
Compare2
Input Capture 1
Input Capture 2
Figure 4. Interrupt Control
Seven of the system interrupts are generated by on-chip peripheral functions, and three external interrupts are
supported. Software configuration of the external interrupts is performed through the INT1, INT2, and INT3
control registers in PF frame 1. Each external interrupt is individually software configurable for input polarity
(rising or falling edge) for ease of system interface. External interrupt INT1 is software configurable as either
a maskable or non-maskable interrupt. When INT1 is configured as nonmaskable, it cannot be masked by the
individual- or global-enable-mask bits. Recall that the INT1 NMI bit is protected during non-privileged operation
and therefore should be configured during the initialization sequence following reset. To maximize pin flexibility,
external interrupts INT2 and INT3 can be software configured as general-purpose input/output pins if the
interrupt function is not required (INT1 can be similarly configured as an input pin). Table 11 shows the
interrupt-vector sources, corresponding addresses, and hardware priorities.



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