TMS370 datasheet(11/73 Pages) TI

11 / 73 page

TMS370Cx6x

8-BIT MICROCONTROLLER

SPNS033C – SEPTEMBER 1995 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

CPU (continued)

program counter (PC)

The contents of the PC point to the memory location of the next instruction to be executed. The PC consists

of two 8-bit registers in the CPU: the program counter high (PCH) and program counter low (PCL). These

registers contain the most-significant byte (MSbyte) and least-significant byte (LSbyte) of a 16-bit address.

The contents of the reset vector (7FFEh, 7FFFh) are loaded into the program counter during reset. The PCH

(MSbyte of the PC) is loaded with the contents of memory location 7FFEh, and the PCL (LSbyte of the PC) is

loaded with the contents of memory location 7FFFh. Figure 2 shows this operation using an example value of

6000h as the contents of memory locations 7FFEh and 7FFFh (reset vector).

Memory

Program Counter

PCH

PCL

0000h

7FFEh

7FFFh

Figure 2. Program Counter After Reset

memory map

The TMS370Cx6x architecture is based on the Von Neuman architecture, where the program memory and data

memory share a common address space. All peripheral input/output is memory mapped in this same common

address space. In the expansion mode, external memory peripherals are also memory-mapped into this

common address. As shown in Figure 3, the TMS370Cx6x provides a 16 bit-address range to access internal

or external RAM, ROM, data EEPROM, EPROM input/output pins, peripheral functions, and system-interrupt

vectors.

The peripheral file contains all input/output port control, on- and off-chip peripheral status and control, EPROM,

EEPROM programming, and system-wide control functions. The peripheral file consists of 256 contiguous

addresses located from 1000h to 10FFh. The 256 contiguous addresses are logically divided into 16 peripheral

file frames of 16 bytes each. Each on-chip peripheral is assigned to a separate frame through which peripheral

control and data information is passed. The TMS370Cx6x has its on-chip peripherals and system control

assigned to peripheral file frames 1 through 8, addresses 1010h through 108Fh.

TMS370 Datasheet(PDF) 11 Page - Texas Instruments