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TMS370 Datasheet(PDF) 1 Page - Texas Instruments |
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TMS370 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 73 page  Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. TMS370Cx6x 8-BIT MICROCONTROLLER SPNS033C – SEPTEMBER 1995 – REVISED FEBRUARY 1997 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 D CMOS/EEPROM/EPROM Technologies on a Single Device – Mask-ROM Devices for High-Volume Production – One-Time-Programmable (OTP) EPROM Devices for Low-Volume Production – Reprogrammable EPROM Devices for Prototyping Purposes D Internal System Memory Configurations – On-Chip Program Memory Versions – ROM: 24K, 32K, or 48K Bytes – EPROM: 32K or 48K Bytes – Data EEPROM: 256 Bytes – Static RAM: 1K or 3.5K Bytes – External Memory / Peripheral Wait States – Precoded External Chip-Select Outputs in Microcomputer Mode D Flexible Operating Features – Low-Power Modes: STANDBY and HALT – Commercial, Industrial, and Automotive Temperature Ranges – Clock Options – Divide-by-4 (0.5 MHz – 5 MHz SYSCLK) – Divide-by-1 (2 MHz – 5 MHz SYSCLK) PLL – Supply Voltage (VCC): 5 V ± 10% D Eight-Channel 8-Bit Analog-to-Digital Converter 1 (ADC1) D Three 16-Bit General Purpose Timers – Software Configurable as Three 16-Bit Event Counters, or Three 16-Bit Pulse Accumulators, or Five 16-Bit Input Capture Functions, or Six Compare Registers, or Three Self-Contained PWM Functions – One Timer Has an 8-Bit Prescaler, Providing a 24-Bit Real-Time Timer D On-Chip 24-Bit Watchdog Timer – EPROM / OTP: Standard Watchdog – Mask-ROM Devices: Hard Watchdog, Simple Counter, or Standard Watchdog D Serial Communications Interface (SCI1) – Asynchronous and Isosynchronous† Modes – Full Duplex, Double-Buffered RX and TX – Two Multiprocessor Communication Formats D Serial Peripheral Interface (SPI) – Variable-Length High-Speed Shift Register – Synchronous Master / Slave Operation D Flexible Interrupt Handling – Two S / W Programmable Interrupt Levels – Global- and Individual-Interrupt Masking – Programmable Rising- or Falling-Edge Detect D TMS370 Series Compatibility – Register-to-Register Architecture – 256 General-Purpose Registers – 14 Powerful Addressing Modes – Instructions Upwardly Compatible With All TMS370 Devices D CMOS/Package /TTL-Compatible I/O Pins – 46 Bidirectional Pins, 9 Input Pins – 68-Pin Plastic and Ceramic Leaded Chip Carrier Packages – All Peripheral Function Pins Are Software Configurable for Digital I / O D Workstation/PC-Based Development System – C Compiler and C Source Debugger – Real-Time In-Circuit Emulation – Extensive Breakpoint / Trace Capability – Software Performance Analysis – Multi-Window User Interface – Microcontroller Programmer PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1997, Texas Instruments Incorporated FN / FZ PACKAGE ( TOP VIEW ) C3 C4 C5 C6 C7 SPISOMI SPICLK SPISIMO T1IC/CR T1PWM T1EVT 9 8 7 6 543 10 11 12 13 14 15 16 2 1 6867 66 65 6463 62 61 27 28 2930 31 32 3334 35 3637 38 39 4041 42 43 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 VCC2 VSS2 A0 A1 A2 A3 A4 A5 A6 A7 T2AEVT T2AIC2/PWM INT1 INT2 INT3 T2BIC2 / PWM T2BEVT D3 / SYSCLK D4 /R /W D5 / CSPF D6/CSH1/EDS D7/CSE1/WAIT RESET † Isosynchronous = Isochronous |
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