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TMS370 Datasheet(PDF) 22 Page - Texas Instruments |
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TMS370 Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 73 page  TMS370Cx6x 8-BIT MICROCONTROLLER SPNS033C – SEPTEMBER 1995 – REVISED FEBRUARY 1997 22 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 clock modules (continued) Divide-by-4 option : SYSCLK + external resonator frequency 4 + CLKIN 4 Divide-by-1 option : SYSCLK + external resonator frequency 4 4 + CLKIN The main advantage of choosing a divide-by-1 oscillator is the improved EMI performance. The harmonics of low-speed resonators extend through less of the emissions spectrum than the harmonics of faster resonators. The divide-by-1 provides the capability of reducing the resonator speed by four times, and this results in a steeper decay of emissions produced by the oscillator. system configuration registers Table 14 contains system configuration and control functions and registers for controlling EEPROM programming. The privileged bits are shown in bold typeface and shaded. Table 14. Peripheral File Frame 1: System Configuration Registers PF BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REG P010 COLD START OSC POWER PF AUTO WAIT OSC FLT FLAG MC PIN WPO MC PIN DATA — µP/µC MODE SCCR0 P011 — — — AUTOWAIT DISABLE — MEMORY DISABLE — — SCCR1 P012 HALT/ STANDBY PWRDWN/ IDLE — BUS STEST CPU STEST — INT1 NMI PRIVILEGE DISABLE SCCR2 P013 Reserved P014 BUSY VPPS — — — — W0 EXE EPCTLH P015 to P016 Reserved P017 INT1 FLAG INT1 PIN DATA — — — INT1 POLARITY INT1 PRIORITY INT1 ENABLE INT1 P018 INT2 FLAG INT2 PIN DATA — INT2 DATA DIR INT2 DATA OUT INT2 POLARITY INT2 PRIORITY INT2 ENABLE INT2 P019 INT3 FLAG INT3 PIN DATA — INT3 DATA DIR INT3 DATA OUT INT3 POLARITY INT3 PRIORITY INT3 ENABLE INT3 P01A BUSY — — — — AP W1W0 EXE DEECTL P01B Reserved P01C BUSY VPPS — — — — W0 EXE EPCTLM P01D Reserved P01E BUSY VPPS — — — — W0 EXE EPCTLL P01F Reserved |
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