DS1876 datasheet(23/69 Pages) MAXIM

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SFP Controller with Dual LDD Interface

Auxiliary Memory (Device A0h) contains 256 bytes

of EE memory accessible from address 00h–FFh. It is

selected with the device address of A0h.

See the Register Descriptions section for a more com-

plete detail of each byte’s function, as well as for read/

write permissions for each byte.

Shadowed EEPROM

Many nonvolatile memory locations (listed within the

EEPROM and are controlled by the SEEB bit in Table

02h, Register 80h.

The DS1876 incorporates shadowed EEPROM memory

locations for key memory addresses that can be writ-

ten many times. By default the shadowed EEPROM bit,

SEEB, is not set and these locations act as ordinary

EEPROM. By setting SEEB, these locations function

like SRAM cells, which allow an infinite number of write

cycles without concern of wearing out the EEPROM.

This also eliminates the requirement for the EEPROM

write time, tWR. Because changes made with SEEB

enabled do not affect the EEPROM, these changes are

not retained through power cycles. The power-on value

is the last value written with SEEB disabled. This func-

tion can be used to limit the number of EEPROM writes

during calibration or to change the monitor thresholds

periodically during normal operation helping to reduce

the number of times EEPROM is written. Figure 14 shows

the memory map and indicates which locations are

shadowed EEPROM.

Figure 14. Memory Map

EEPROM

(256 BYTES)

FFh

I2C ADDRESS A0h

I2C ADDRESS A2h/B2h

00h

ALARM-

ENABLE ROW

(8 BYTES)

PASSWORD ENTRY

(PWE) (4 BYTES)

TABLE-SELECT

BYTE

FFh

80h

F8h

MOD1/2

OFFSET LUT

FFh

F8h

TABLE 01h

(A2h ONLY)

EEPROM

(120 BYTES)

F7h

7Fh

00h

LOWER

MEMORY

FFh

80h

TABLE 02h

NONLOOKUP

TABLE CONTROL

AND

CONFIGURATION

REGISTERS

(B2h ONLY CONTAINS

TRANSMITTER 2-

RELATED REGISTERS)

80h

TABLE 04h

MOD1 (A2h)

MOD2 (B2h)

LOOKUP TABLE

(72 BYTES)

C7h

F8h TABLE 05h

ALARM-ENABLE ROW

(8 BYTES)

ALARM-ENABLE ROW

CAN BE CONFIGURED

TO EXIST AT TABLE 01h

OR TABLE 05h USING

MASK BIT IN TABLE 02h,

FFh

NOTE 1: IF ASEL = 0, THEN THE MAIN DEVICE I2C SLAVE ADDRESS IS A2h/B2h.

IF ASEL = 1, THEN THE MAIN DEVICE I2C SLAVE ADDRESS IS DETERMINED BY THE VALUE IN

TABLE 02h, REGISTER 8Bh.

NOTE 2: TABLE 00h DOES NOT EXIST.

NOTE 3: ALARM-ENABLE ROW CAN BE CONFIGURED TO EXIST AT TABLE 01h OR TABLE 05h USING THE

MASK BIT IN TABLE 02h, REGISTER 88h.

(APC1/2, HBATH1/2,

TXP HI 1/2, TXP LO 1/2)

OFFSET LUT

FFh

E0h

80h

TABLE 06h

APC1 (A2h)

APC2 (B2h)

LOOKUP TABLE

(72 BYTES)

C7h

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