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900844 Datasheet(PDF) 43 Page - Freescale Semiconductor, Inc |
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900844 Datasheet(HTML) 43 Page - Freescale Semiconductor, Inc |
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43 / 118 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 43 900844 FUNCTIONAL DEVICE OPERATION CLOCK GENERATION AND REAL TIME CLOCK (RTC) CLOCK GENERATION AND REAL TIME CLOCK (RTC) CLOCK GENERATION A system clock is generated for internal digital circuitry, as well as for external applications utilizing the clock output pins. A crystal oscillator is used for the 32.768 kHz time base and generation of related derivative clocks. If the crystal oscillator is not running (for example, if the crystal is not present), an internal 32 kHz oscillator will be used instead. Clocking Scheme The internal 32 kHz oscillator is an integrated backup for the crystal oscillator and provides a 32.768 kHz nominal frequency at 50% accuracy, if running. The internal oscillator only runs if a valid supply is available at the battery or coin cell, and would not be used as long as the crystal oscillator is active. The crystal oscillator continues running, supplied from one of the sources as described previously, until all power is depleted or removed. All control functions will run off the crystal derived frequency, occasionally referred to as the "32 kHz". At system startup, the 32 kHz clock is driven to the CLK32K output pin, which is SPIVCC referenced. CLK32K is provided as a peripheral clock reference. The driver is enabled by the startup sequencer. Additionally, a SPI bit M32KCLK bit is provided for direct SPI control. The M32KCLK bit defaults to 0 to enable the driver and resets on the RTCPORB to ensure the buffer is activated at the first power up and configured as desired, for subsequent power ups. The drive strength of the output drivers is programmable with CLK32KDRV[1:0] (master control bits that affect the drive strength of CLK32K), see FSLOUTDRVCNTL2 Register in Table 16. If a switch over occurs between the two clock sources (such as when the crystal oscillator is starting up), it will occur during the active low phase of both clocks, to avoid clocking glitches. A status bit, OSCSTP, is available to indicate to the processor which clock is currently selected: OSCSTP=1 when the internal RC is used, and OSCSTP=0 if the XTAL source is used. Oscillator Specifications The 32 kHz crystal oscillator has been optimized for use in conjunction with the Abracon™ ABS07-32.768KHZ-T, or equivalent. The electrical characteristics of the 32 kHz Crystal oscillators are given in the Oscillator section on Table 3 and Table 4, taking into account the crystal characteristics noted previously. The oscillator accuracy depends largely on the temperature characteristics of the used crystal. Application circuits can be optimized for required accuracy by adapting the external crystal oscillator network (via component accuracy and/or tuning). Additionally, a clock calibration system is provided to adjust the 32.768 cycle counter that generates the 1.0 Hz timer and RTC registers; see Real Time Clock (RTC) for more detail. REAL TIME CLOCK (RTC) The RTC block provides a real-time clock with time-of-day, year, month, and date, as well as daily alarm capabilities. The real- time clock will use the 32.768 kHz oscillator as its input clock. The real-time clock will be powered by the coin cell backup battery as a last resort, if no other power source is available (Battery or USB/Wall plug). The register set is compatible with the Motorola™ MC146818 RTC device. Overview The RTC module uses a 15-bit counter to generate a 1.0 Hz clock for timekeeping. The seven time and calendar registers keep track of seconds, minutes, hours, day-of-week, day-of-month, month, and year. The three seconds, minutes, and hours alarm registers can be used to generate time-of-day alarm interrupts. The RTC time, alarm, and calendar values can be represented in 8-bit binary or BCD format. The hours and hours alarm values can be represented in 24 hour or 12 hour format, with AM/PM in the 12 hour mode. RTC control register B allows for software configurable clock formatting and interrupt masking. Control registers A, C, and D, report software testable RTC status, including interrupt flags, update-in-progress, and valid-RAM-time. The RTC resets when the RTCPORB signal is driven low. The clock and calendar registers will be initialized to 00:00:00, Sunday, January 1, 2000. |
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