900844 datasheet(102/118 Pages) FREESCALE

102 / 118 page

Analog Integrated Circuit Device Data

102

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

SPI REGISTER MAP

SPI BIT MAP

The tables include the following fields:

• Block: This corresponds directly to the chapter, section or topic in which the detailed register description is included.

• Address: The register memory map address allocation in HEX format

• Register Name

• R/W: Defines if the register is a Read/Write register or only a Read register

• D7-D0: The 8-bit data included in the register with each bit's name and location within the field included

• Initial: The register's default value after power up

• Function: A short description of the register's function

Some important notes about data in the table:

• Reserved registers/bits are not implemented in the design and they will always read as a 0

• Registers under the "FSL" block are Freescale dedicated registers and are not defined in the customer specifications. These

registers represent additional functionality that Freescale is offering to enhance the performance of the overall system

• Registers under the "VD2" and "VD3" blocks are blocked from being used by Freescale

• The table only displays up to address 0x2FF. Address space between 0x300 and 0x3FF is reserved for future application use.

Freescale is currently using the 0x300 to 0x3FF space for test and debug register implementation. This will not effect the

application or any future use plans for this address space. The details of this space implementation are not discussed in this

document.

Table 74. SPI Register Map

Block

Address

R/W

Initial

Function

Chip1

0x00

ID1

RSVD

REV1[2:0]

VENDID1[2:0]

0x38 Chip1 ID

Chip2

0x01

ID2

RSVD

REV2[2:0]

VENDID2[2:0]

0x00 Chip2 ID

Chip3

0x02

ID3

RSVD

0x00 Chip3 ID

Chip4

0x03

ID4

RSVD

0x00 Chip4 ID

IRQ

0x04

INTERRUPT

EXT

AUX

VRFAULT

GPIO

RTC

CHR

ADC

PWRBTN

0x00 PMIC_INT sources,

read clears

IRQ

0x05

INTMASK

R/W

MEXT

MAUX

MVRFAULT

MGPIO

MRTC

MCHR

MADC

MPWRBTN 0xFA IRQ mask

CNTRL

0x06

CHIPCNTRL

R/W

RSVD

WARMRST COLDRST

0x00 PWRGD/RESET#

control

RSVD

0x07

RSVD

0x00 Reserved

RSVD

0x08

RSVD

0x00 Reserved

RSVD

0x09

RSVD

0x00 Reserved

RSVD

0x0A

RSVD

0x00 Reserved

RSVD

0x0B

RSVD

0x00 Reserved

RSVD

0x0C

RSVD

0x00 Reserved

RSVD

0x0D

RSVD

0x00 Reserved

RSVD

0x0E

RSVD

0x00 Reserved

RSVD

0x0F

RSVD

0x00 Reserved

RTC

0x10

RTCS

R/W

RSVD

SEC[6:0]

0x00 RTC Second

RTC

0x11

RTCSA

R/W

RSVD

SECALARM[6:0]

0x00 RTC Second Alarm

RTC

0x12

RTCM1

R/W

RSVD

MIN[6:0]

0x00 RTC Minutes

RTC

0x13

RTCMA

R/W

RSVD

MINIALARM[6:0]

0x00 RTC Minutes Alarm

RTC

0x14

RTCH

R/W

PA-H

RSVD

HRS[5:0]

0x00 RTC Hours

RTC

0x15

RTCHA

R/W

PA-HA

RSVD

HRSALARM[5:0]

0x00 RTC Hours Alarm

RTC

0x16

RTCDW

R/W

RSVD

DOW[2:0]

0x01 RTC Day Of Week

RTC

0x17

RTCDM

R/W

RSVD

DOM[5:0]

0x01 RTC Day Of Month

RTC

0x18

RTCM2

R/W

19/20

RSVD

MONTH[4:0]

0x01 RTC Month

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