AMD-K6 datasheet(230/346 Pages) AMD

230 / 346 page

212

Test and Debug

Chapter 11

AMD-K6® Processor Data Sheet

20695H/0—March 1998

Preliminary Information

SAMPLE/PRELOAD. The SAMPLE/PRELOAD instruction performs

two functions. These functions are as follows:

During the Capture-DR state, the processor loads the BSR

shift register with the current state of every input, output,

and bidirectional pin.

During the Update-DR state, the BSR output register is

loaded from the BSR shift register in preparation for the

next EXTEST instruction.

The SAMPLE/PRELOAD instruction does not affect the normal

operational state of the processor.

BYPASS. The BYPASS instruction selects the BR register, which

reduces the boundary-scan length through the processor from

281 to one (TDI to BR to TDO). The BYPASS instruction does

not affect the normal operational state of the processor.

IDCODE. The IDCODE instruction selects the DIR register,

allowing the device identification code to be shifted out of the

processor. This instruction is loaded into the IR when the TAP

controller is reset. The IDCODE instruction does not affect the

normal operational state of the processor.

HIGHZ. T h e HIG H Z ins t ruc t ion f o rc es al l out p ut and

bidirectional pins to be floated. During this instruction, the BR

is selected and the normal operational state of the processor is

not affected.

TAP Controller State

Machine

The TAP controller state diagram is shown in Figure 73 on page

213. State transitions occur on the rising edge of TCK. The

logic 0 or 1 next to the states represents the value of the TMS

signal sampled by the processor on the rising edge of TCK.

AMD-K6 Datasheet(PDF) 230 Page - Advanced Micro Devices