AMD-K6 datasheet(255/346 Pages) AMD

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Chapter 15

I/O Buffer Characteristics

237

20695H/0—March 1998

AMD-K6® Processor Data Sheet

Preliminary Information

I/O Buffer Characteristics

All of the AMD-K6 processor inputs, outputs, and bidirectional

buffers are implemented using a 3.3 V buffer design. In

addition, a subset of the processor I/O buffers include a second,

higher drive strength option. These buffers can be configured to

provide the higher drive strength for applications that place a

heavier load on these I/O signals.

AMD has developed two I/O buffer models that represent the

characteristics of each of the two possible drive strength

configurations supported by the AMD-K6. These two models are

called the Standard I/O Model and the Strong I/O Model.

AMD developed the two models to allow system designers to

perform analog simulations of AMD-K6 signals that interface

with the system logic. Analog simulations are used to determine

a signal’s time of flight from source to destination and to ensure

that the system’s signal quality requirements are met. Signal

quality measurements include overshoot, undershoot, slope

reversal, and ringing.

15.1

Selectable Drive Strength

The AMD-K6 processor samples the BRDYC# input during the

falling transition of RESET to configure the drive strength of

A[20:3], ADS#, HITM# and W/R#. If BRDYC# is 0 during the fall

of RESET, these particular outputs are configured using the

higher drive strength. If BRDYC# is 1 during the fall of RESET,

the standard drive strength is selected for all I/O buffers.

Table 46 shows the relationship between BRDYC# and the two

available drive strengths — K6STD and K6STG.

Table 46. A[20:3], ADS#, HITM#, and W/R# Strength Selection

Drive Strength

BRDYC#

I/O Buffer Name

Strength 1 (standard)

K6STD

Strength 2 (strong)

K6STG

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