28F128 datasheet(18/58 Pages) INTEL

18 / 58 page

28F128J3A, 28F640J3A, 28F320J3A

Preliminary

NOTES:

1. Commands other than those shown above are reserved by Intel for future device implementations and

should not be used.

2. The Basic Command Set (BCS) is the same as the 28F008SA Command Set or Intel Standard Command

Set. The Scalable Command Set (SCS) is also referred to as the Intel Extended Command Set.

3. Bus operations are defined in Table 3.

4. X = Any valid address within the device.

BA = Address within the block.

IA = Identifier Code Address: see Figure 5 and Table 15.

QA = Query database Address.

PA = Address of memory location to be programmed.

RCD = Data to be written to the read configuration register. This data is presented to the device on A16-1; all

other address inputs are ignored.

5. ID = Data read from Identifier Codes.

QD = Data read from Query database.

SRD = Data read from status register. See Table 16 for a description of the status register bits.

PD = Data to be programmed at location PA. Data is latched on the rising edge of WE#.

CC = Configuration Code.

6. The upper byte of the data bus (DQ8–DQ15) during command writes is a “Don’t Care” in x16 operation.

7. Following the Read Identifier Codes command, read operations access manufacturer, device and block lock

codes. See Section 4.3 for read identifier code data.

8. If the WSM is running, only DQ7 is valid; DQ15–DQ8 and DQ6–DQ0 float, which places them in a high-

impedance state.

9. After the Write to Buffer command is issued check the XSR to make sure a buffer is available for writing.

Table 4.

Intel® StrataFlash™ Memory Command Set Definitions(1)

Command

Scalable or

Basic

Command

Set(2)

Bus

Cycles

Req’d.

Notes

First Bus Cycle

Second Bus Cycle

Oper(3)

Addr(4)

Data(5,6)

Oper(3)

Addr(4)

Data(5,6)

Read Array

SCS/BCS

Write

FFH

Read Identifier Codes

SCS/BCS

≥ 2

Write

90H

Read

Read Query

SCS

≥ 2

Write

98H

Read

Read Status Register

SCS/BCS

Write

70H

Read

SRD

Clear Status Register

SCS/BCS

Write

50H

Write to Buffer

SCS/BCS

> 2

9, 10,

Write

E8H

Write

Word/Byte Program

SCS/BCS

12,13

Write

40H

10H

Write

Block Erase

SCS/BCS

11,12

Write

20H

Write

D0H

Block Erase, Program

Suspend

SCS/BCS

12,14

Write

B0H

Block Erase, Program

Resume

SCS/BCS

Write

D0H

Configuration

SCS

Write

B8H

Write

Set Block Lock-Bit

SCS

Write

60H

Write

01H

Clear Block Lock-Bits

SCS

Write

60H

Write

D0H

Protection Program

Write

C0H

Write

28F128 Datasheet(PDF) 18 Page - Intel Corporation

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