28F128 datasheet(54/58 Pages) INTEL

54 / 58 page

28F128J3A, 28F640J3A, 28F320J3A

Preliminary

6.7

Block Erase, Program, and Lock-Bit Configuration

Performance(1,2,3)

NOTES:

1. Typical values measured at TA = +25 °C and nominal voltages. Assumes corresponding lock-bits are not set.

Subject to change based on device characterization.

2. These performance numbers are valid for all speed versions.

3. Sampled but not 100% tested.

4. Excludes system-level overhead.

5. These values are valid when the buffer is full, and the start address is aligned on a 32-byte boundary.

6. Effective per-byte program time (tWHQV1, tEHQV1) is 6.8 µs/byte (typical)

7. Effective per-word program time (tWHQV2, tEHQV2) is 13.6 µs/word (typical)

8. Max values are measured at worst case temperature and VCC corner after 100k cycles

Sym

Parameter

Notes

Typ

Max

Unit

W16

Write Buffer Byte Program Time

(Time to Program 32 bytes/16 words)

4,5,6,7

218

654

µs

W16

tWHQV3

tEHQV3

Byte Program Time (Using Word/Byte Program

Command)

210

630

µs

Block Program Time (Using Write to Buffer Command)

0.8

2.4

sec

W16

tWHQV4

tEHQV4

Block Erase Time

1.0

5.0

sec

W16

tWHQV5

tEHQV5

Set Lock-Bit Time

µs

W16

tWHQV6

tEHQV6

Clear Block Lock-Bits Time

0.5

0.70

sec

W16

tWHRH1

tEHRH1

Program Suspend Latency Time to Read

µs

W16

tWHRH

tEHRH

Erase Suspend Latency Time to Read

µs

28F128 Datasheet(PDF) 54 Page - Intel Corporation

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