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28F128 Datasheet(PDF) 23 Page - Intel Corporation |
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28F128 Datasheet(HTML) 23 Page - Intel Corporation |
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23 / 58 page ![]() 28F128J3A, 28F640J3A, 28F320J3A Preliminary 17 4.2.6 Device Geometry Definition This field provides critical details of the flash device geometry. Device Geometry Definition Table 11. Device Geometry Definition Offset Length Description Code See Table Below 27h 1 “n” such that device size = 2n in number of bytes 27: 28h 2 Flash device interface: x8 async x16 async x8/x16 async 28: --02 x8/ x16 28:00,29:00 28:01,29:00 28:02,29:00 29: --00 2Ah 2 “n” such that maximum number of bytes in write buffer = 2n 2A: --05 32 2B: --00 2Ch 1 Number of erase block regions within device: 1. x = 0 means no erase blocking; the device erases in “bulk” 2. x specifies the number of device or partition regions with one or more contiguous same-size erase blocks 3. Symmetrically blocked partitions have one blocking region 4. Partition size = (total blocks) x (individual block size) 2C: --01 1 2Dh 4 Erase Block Region 1 Information 2D: bits 0–15 = y, y+1 = number of identical-size erase blocks 2E: bits 16–31 = z, region erase block(s) size are z x 256 bytes 2F: 30: Address 32 Mbit 64 Mbit 128 Mbit 27: --16 --17 --18 28: --02 --02 --02 29: --00 --00 --00 2A: --05 --05 --05 2B: --00 --00 --00 2C: --01 --01 --01 2D: --1F --3F --7F 2E: --00 --00 --00 2F: --00 --00 --00 30: --02 --02 --02 |
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