82375EB datasheet(89/131 Pages) INTEL

89 / 131 page

82375EBSB

5412 Rotating Priority Mode

When any bank rotate control bit is set to a one that particular bank rotates between the requesting inputs

Any or all banks can be set in rotate mode If all four banks are set in rotate mode the six supported masters

are all rotated and the arbiter is in a pure rotating priority mode If within a rotating bank the highest priority

device (a) does not have an active request the lower priority device (b or c) will be granted the bus However

this does not change the rotation scheme When the bank toggles device b is the highest priority Because of

this the maximum latency a device can encounter is two complete rotations

5413 Mixed Priority Mode

Any combination of fixed priority and rotate priority modes can be used in different arbitration banks to achieve

a specific arbitration scheme

5414 Locking Masters

When a master acquires the PLOCK

signal the arbiter gives that master highest priority until PLOCK

negated and FRAME

is negated This insures that a master that locked a resource will eventually be able to

unlock that same resource

542 ARBITRATION SIGNALING PROTOCOL

An agent requests the PCI Bus by asserting its REQ

When the arbiter determines that an agent may use the

PCI Bus it asserts the agent’s GNT

Figure 22 shows an example of the basic arbitration cycle Two agents

(A and B) are used to illustrate how the arbiter alternates bus accesses Note in Figure 22 that the current

owner of the bus may keep its REQ

(REQ -A) asserted when it requires additional transactions

REQ -A is asserted prior to or at clock 1 to request use of the PCI Bus Agent A is granted access to the bus

(GNT -A is asserted) at clock 2 Agent A may start a transaction at clock 2 because FRAME

and IRDY

are negated and GNT -A is asserted Agent A’s transaction starts when FRAME

is asserted (clock 3)

Agent A requests another transaction by keeping REQ -A asserted

When FRAME

is asserted on clock 3 the arbiter determines that agent B has priority and asserts GNT -B

and negates GNT -A on clock 4 When agent A completes its transaction on clock 4 it relinquishes the bus

All PCI agents can determine the end of the current transaction when both FRAME

and IRDY

are negated

Agent B becomes the PCI Bus owner on clock 5 (FRAME

and IRDY

are negated) and completes its

transaction on clock 7 Note that REQ -B is negated and FRAME

is asserted on clock 6 indicating that

agent B requires only a single transaction The arbiter grants the next transaction to agent A because its

REQ

is still asserted

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