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82375EB Datasheet(PDF) 90 Page - Intel Corporation |
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82375EB Datasheet(HTML) 90 Page - Intel Corporation |
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90 / 131 page ![]() 82375EBSB 5421 REQ And GNT Rules Figure 22 illustrates basic arbitration Once asserted GNT may be negated according to the following rules 1 If GNT is negated at the same time that FRAME is asserted the bus transaction is valid and will continue 2 One GNT can be negated coincident with another being asserted if the bus is not in the idle state Otherwise a one clock delay is incurred between the negation of the current master’s GNT and assertion of the next master’s GNT to comply with the PCI specification 3 While FRAME is negated GNT may be negated at any time in order to service a higher priority master or in response to the associated REQ being negated 4 If the MEMREQ and MEMACK are asserted once the PCEB is granted the PCI Bus the arbiter will not remove the internal grant until the PCEB removes it’s request 290477 – 64 Figure 22 Basic Arbitration 5422 Back-to-Back Transactions Figure 23 illustrates arbitration for a back-to-back access There are two types of back-to-back transactions by the same initiator those that do not require a turn-around-cycle (see Section 5131 Turn-Around-Cycle Definition) and those that do A turn-around-cycle is not required when the initiator’s second transaction is to the same target as the first transaction (to insure no TRDY contention) and the first transaction is a write This is a fast back-to-back Under all other conditions the initiator must insert a minimum of one turn-around- cycle During a fast back-to-back transaction the initiator starts the next transaction immediately without a turn- around-cycle The last data phase completes when FRAME is negated and IRDY and TRDY are assert- ed The current initiator starts another transaction on the same PCICLK that the last data is transferred for the previous transaction 90 |
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