82375EB datasheet(26/131 Pages) INTEL

26 / 131 page

82375EBSB

Pin Name

Type

Description

DATA SWAP BUFFER CONTROL

SDCPYEN01

COPY ENABLE

These active Low signals perform byte copy operation on the

EISA data bus (SD 310 ) The Copy Enable signals are asserted during mis-

SDCPYEN02

matched cycles and are used by the PCEB to enable byte copy operations

SDCPYEN03

between the SD data byte lanes 0 1 2 and 3 as follows

SDCPYEN13

SDCPYEN01

Copy between Byte Lane 0 (SD 70 ) and Byte Lane 1

(SD 158 )

SDCPYEN02

Copy between Byte Lane 0 (SD 70 ) and Byte Lane 2

(SD 2316 )

SDCPYEN03

Copy between Byte Lane 0 (SD 70 ) and Byte Lane 3

(SD 3124 )

SDCPYEN13

Copy between Byte Lane 1 (SD 158 ) and Byte Lane 3

(SD 3124 )

Note that the direction of the copy is controlled by SDCPYUP

SDCPYUP

SYSTEM DATA COPY UP

SDCPYUP controls the direction of the byte copy

operation A high on SDCPYUP indicates a COPY UP operation where the lower

byte(s) of the SD data bus are copied onto the higher byte(s) of the bus A low on

the signal indicates a COPY DOWN operation where the higher byte(s) of the data

bus are copied on to the lower byte(s) of the bus The PCEB uses this signal to

perform the actual data byte copy operation during mis-matched cycles

SDOE 20

SYSTEM DATA OUTPUT ENABLE

These active Low signals enable the SD data

output onto the EISA Bus The ESC only activates these signals during mis-

matched cycles The PCEB uses these signal to enable the SD data buffers as

follows

SDOE0

Enables byte lane 0 SD 70

SDOE1

Enables byte lane 1 SD 158

SDOE2

Enables byte lane 3 SD 3124 and byte lane 2

SD 2316

SDLE 30

SYSTEM DATA LATCH ENABLE

SDLE 30

enable the latching of data on the

EISA Bus These signals are activated only during mis-matched cycles except

PCEB-initiated write cycles The PCEB uses these signals to latch the SD data bus

as follows

SDLE0

Latch byte lane 0 SD 70

SDLE1

Latch byte lane 1 SD 158

SDLE2

Latch byte lane 2 SD 2316

SDLE3

Latch byte lane 3 SD 3124

27 Test Signal

Pin Name

Type

Description

TEST

This pin is used to tri-state all PCEB outputs During normal operations this pin

must be tied high

82375EB Datasheet(PDF) 26 Page - Intel Corporation

82375EB Datasheet(HTML) 26 Page - Intel Corporation

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