82375EB datasheet(10/131 Pages) INTEL

10 / 131 page

82375EBSB

memory treadmill enabling the IO core to provide maximum benefit over multiple generations of processor

memory technology For this reason the PCI-EISA Bridge can be used with different processors (ie deriva-

tives of the Intel486 CPU or the new generation processors such as the Pentium processor) Regardless of

the new requirements imposed on the processor side of the HostPCI Bridge (eg 64-bit data path 33V

interface etc) the PCI side remains unchanged This standard PCI environment allows reusability not only of

the rest of the platform chip set (ie PCI-EISA Bridge) but also of all other IO functions interfaced at the PCI

level These functions typically include graphics SCSI and LAN

EISA Bus

The EISA bus in the system shown in the Figure 1 represents a second level IO bus It allows personal

computer platforms built around the PCI as a primary IO bus to leverage the large EISAISA product base

Combinations of PCI and EISA buses both of which can be used to provide expansion functions will satisfy

even the most demanding applications

Along with compatibility for 16-bit and 8-bit ISA hardware and software the EISA bus provides the following

key features

32-bit addressing and 32-bit data path

33 MBytesec bus bandwidth

Multiple bus master support through efficient arbitration

Support for autoconfiguration

Integrated Bus Central Control Functions

The PCI-EISA Bridge chip set integrates central bus functions on both the PCI and EISA Buses For PCI the

functions include PCI bus arbitration and the default bus driver For the EISA Bus central functions include the

EISA Bus controller and EISA arbiter that are integrated in the ESC and EISA data swap buffers that are

integrated in the PCEB

Integrated System Functions

The PCI-EISA Bridge chip set integrates system functions including PCI parity and system error reporting

buffer management PCI and EISA memory and IO address space mapping and decoding For maximum

flexibility all of these functions are programmable allowing for variety of optional features

11 PCEB Overview

The PCEB and ESC form a PCI-EISA Bridge chip set The PCEBESC interface provides the inter-chip com-

munications between these two devices The major functions provided by the PCEB are described in this

section

PCI Bus Interface

The PCEB can be either a master or slave on the PCI Bus and supports bus frequencies from 25-to-33 MHz

The PCEB becomes a slave when it positively decodes a PCI cycle The PCEB also becomes a slave for

unclaimed cycles on the PCI Bus These unclaimed cycles are subtractively decoded by the PCEB and

forwarded to the EISA Bus As a slave the PCEB supports single cycle transfers for memory IO and

configuration operations

82375EB Datasheet(PDF) 10 Page - Intel Corporation