82375EB datasheet(23/131 Pages) INTEL

23 / 131 page

82375EBSB

Pin Name

Type

Description

SD 310

SYSTEM DATA

SD 310 are bi-directional data lines that transfer data between the

PCEB and other EISA devices Data transfer between EISA and PCI devices use

these signals The data swapping logic in the PCEB ensures that the data is available

on the correct byte lanes for any given transfer During reset these signals are tri-

stated

REFRESH

When asserted REFRESH

indicates to the PCEB that the current cycle

on the EISA Bus is a refresh cycle It is used by the PCEB decoder to distinguish

between EISA memory read cycles and refresh cycles

NOTE

Mis-matched Cycles

When the PCEB is an EISA master cycles to the slaves other than 32 bits transfers are considered

a mis-matched cycle For mis-matched cycles the PCEB backs off the EISA Bus one and half BCLKs after it asserted

START

by releasing (floating) START

BE 30

and the SD 310 lines The ESC device then takes control of the

transfer The ESC controls the transfer until the last transfer At the end of the last transfer the control is transferred back to

the PCEB The ESC transfers control back to the PCEB by asserting EX32

and EX16

on the falling edge of BCLK before

the rising edge of BCLK when the last CMD

is negated

25 ISA Interface Signals

An ISA interface signal is included to improve the PCEB’s handling of IO cycles on the EISA side of the

bridge This signal permits ISA masters to address PCI IO slaves using the full 16-bit bus size The signal also

allows the PCEB to identify 8-bit IO slaves for purposes of generating the correct amount of IO recovery

Pin Name

Type

Description

IO16

16-BIT IO CHIP SELECT

As an EISA slave the PCEB asserts IO16

when

PIODEC

is asserted or an IO cycle to PCI is detected

As an EISA master the PCEB uses IO16

as an input to determine the correct amount

of IO recovery time from the IO Recovery Time (IORT) Register This register

contains bit-fields that are used to program recovery times for 8-bit and 16-bit IO

When IO16

is asserted the recovery time programmed into the 16-bit IO field (bits

10 ) if enabled is used When IO16

is negated the recovery time programmed into

the 8-bit IO field (bits 53 ) if enabled is used

This signal must have an external pull-up resistor During reset this signal is not driven

82375EB Datasheet(PDF) 23 Page - Intel Corporation

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