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PEB2256HT Datasheet(PDF) 308 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 308 Page - Infineon Technologies AG |
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308 / 490 page ![]() FALC56 V1.2 PEB 2256 E1 Registers Data Sheet 308 2002-08-27 Receive Signaling Status Register (Read) RSIS relates to the last received HDLC frame; it is copied into RFIFO when end-of-frame is recognized (last byte of each stored frame). VFR Valid Frame - HDLC Channel 1 Determines whether a valid frame has been received. 1= Valid 0 = Invalid An invalid frame is either – a frame which is not an integer number of 8 bits (n ×8 bits) in length (e.g. 25 bits), or – a frame which is too short taking into account the operation mode selected by MODE (MDS(2:0)) and the selection of receive CRC on/off (CCR2.RCRC) as follows: • MDS(2:0) = 011 (16 bit Address), RCRC = 0: 4 bytes; RCRC = 1: 3 or 4 bytes • MDS(2:0) = 010 (8 bit Address), RCRC = 0: 3 bytes; RCRC = 1: 2 or 3 bytes Note:Shorter frames are not reported. RDO Receive Data Overflow - HDLC Channel 1 A RFIFO data overflow has occurred during reception of the frame. Additionally, an interrupt can be generated (refer to ISR1.RDO/ IMR1.RDO). CRC16 CRC16 Compare/Check - HDLC Channel 1 0 = CRC check failed; received frame contains errors. 1 = CRC check o.k.; received frame is error-free. RAB Receive Message Aborted - HDLC Channel 1 This bit is set in SS7 mode, if the maximum number of octets (272+7) is exceeded. The received frame was aborted from the transmitting station. According to the HDLC protocol, this frame must be discarded by the receiver station. 70 RSIS VFR RDO CRC16 RAB HA1 HA0 LA (65) |
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