PEB2256HT datasheet(309/490 Pages) INFINEON

309 / 490 page

FALC56 V1.2

PEB 2256

E1 Registers

Data Sheet

309

2002-08-27

HA1, HA0

High Byte Address Compare - HDLC Channel 1

Significant only if 2-byte address mode or SS7 mode has been

selected.

In operating modes which provide high byte address recognition, the

FALC56 compares the high byte of a 2-byte address with the contents

of two individually programmable registers (RAH1, RAH2) and the

fixed values FE

H and FCH (broadcast address).

Depending on the result of this comparison, the following bit

combinations are possible (SS7 support not active):

00 = RAH2 has been recognized

01 = Broadcast address has been recognized

10 = RAH1 has been recognized C/R = 0 (bit 1)

11 = RAH1 has been recognized C/R = 1 (bit 1)

Note: If RAH1, RAH2 contain identical values, a match is indicated

by "10" or "11".

If Signaling System 7 support is activated (see MODE register), the

bit functions are defined as follows:

00 = Not valid

01 = Fill in signaling unit (FISU) detected

10 = Link status signaling unit (LSSU) detected

11 = Message signaling unit (MSU) detected

Low Byte Address Compare - HDLC Channel 1

Significant in HDLC modes only.

The low byte address of a 2-byte address field, or the single address

byte of a 1-byte address field is compared to two registers. (RAL1,

RAL2).

0 =

RAL2 has been recognized

1 =

RAL1 has been recognized

PEB2256HT Datasheet(PDF) 309 Page - Infineon Technologies AG