PEB2256HT datasheet(323/490 Pages) INFINEON

Part #	PEB2256HT

Description	E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications

PDF	490 Pages

Scroll/Zoom	100%

Manufacturer	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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FALC56 V1.2

PEB 2256

E1 Registers

Data Sheet

323

2002-08-27

Receive Byte Count Register 2 (Read)

Value after reset: 00

OV2

Counter Overflow - HDLC Channel 2

0 =

Less than or equal to 128 bytes received

1 =

More than 128 bytes received

RBC2(6:0)

Receive Byte Count - HDLC Channel 2

Indicates the length of a received frame.

Receive Byte Count Register 3 (Read)

Value after reset: 00

OV3

Counter Overflow - HDLC Channel 3

0 =

Less than or equal to 128 bytes received

1 =

More than 128 bytes received

RBC3(6:0)

Receive Byte Count - HDLC Channel 3

Indicates the length of a received frame.

Signaling Status Register 2 (Read)

Value after reset: 00

XDOV2

Transmit Data Overflow - HDLC Channel 2

More than 32 bytes have been written to the XFIFO2.

This bit is reset

• by a transmitter reset command XRES or

• when all bytes in the accessible half of the XFIFO2 have been

moved in the inaccessible half.

RBC2

OV2

RBC26

RBC25

RBC24

RBC23

RBC22

RBC21

RBC20

(90)

RBC3

OV3

RBC36

RBC35

RBC34

RBC33

RBC32

RBC31

RBC30

(91)

SIS2

XDOV2

XFW2

XREP2

RLI2

CEC2

(98)

PEB2256HT Datasheet(PDF) 323 Page - Infineon Technologies AG

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