Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

PEB2256HT Datasheet(PDF) 272 Page - Infineon Technologies AG

Part # PEB2256HT
Description  E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
PDF  490 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 272 Page - Infineon Technologies AG

Back Button PEB2256HT Datasheet HTML 268Page - Infineon Technologies AG PEB2256HT Datasheet HTML 269Page - Infineon Technologies AG PEB2256HT Datasheet HTML 270Page - Infineon Technologies AG PEB2256HT Datasheet HTML 271Page - Infineon Technologies AG PEB2256HT Datasheet HTML 272Page - Infineon Technologies AG PEB2256HT Datasheet HTML 273Page - Infineon Technologies AG PEB2256HT Datasheet HTML 274Page - Infineon Technologies AG PEB2256HT Datasheet HTML 275Page - Infineon Technologies AG PEB2256HT Datasheet HTML 276Page - Infineon Technologies AG Next Button
Zoom Inzoom in Zoom Outzoom out
 272 / 490 page
background image
FALC56 V1.2
PEB 2256
E1 Registers
Data Sheet
272
2002-08-27
XCRC2
Transmit CRC ON/OFF - HDLC Channel 2
If this bit is set, the CRC checksum will not be generated internally. It
has to be written as the last two bytes in the transmit FIFO (XFIFO2).
The transmitted frame is closed automatically with a closing flag.
ITF2
Interframe Time Fill - HDLC Channel 2
Determines the idle (= no data to be sent) state of the transmit data
coming from the signaling controller.
0
= Continuous logical "1" is output
1
= Continuous flag sequences are output ("01111110" bit patterns)
XMFA2
Transmit Multiframe Aligned - HDLC Channel 2
Determines the synchronization between the framer and the
corresponding signaling controller.
0 =
The contents of the XFIFO2 is transmitted without multiframe
alignment.
1 =
The contents of the XFIFO2 is transmitted multiframe aligned.
RFT12, RFT02
RFIFO2 Threshold Level - HDLC Channel 2
The size of the accessible part of RFIFO2 can be determined by
programming these bits. The number of valid bytes after an RPF
interrupt is given in the following table:
The value of RFT(1:0)2 can be changed dynamically if reception is
not running or after the current data block has been read, but before
the command CMDR3.RMC2 is issued (interrupt controlled data
transfer).
RFT12
RFT02
Size of Accessible Part of RFIFO2
0
0
1
1
0
1
0
1
32 bytes (default value)
16 bytes
4 bytes
2 bytes



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com