PEB2256HT datasheet(292/490 Pages) INFINEON

292 / 490 page

FALC56 V1.2

PEB 2256

E1 Registers

Data Sheet

292

2002-08-27

LFA

Loss of Frame Alignment

This bit is set after detecting 3 or 4 consecutive incorrect FAS words

or 3 or 4 consecutive incorrect service words (can be disabled). With

the rising edge of this bit an interrupt status bit (ISR2.LFA) is set. The

specification of the loss of synchronization conditions is done by bits

RC0.SWD and RC0.ASY4. After loss of synchronization, the frame

aligner resynchronizes automatically.

The following conditions have to be detected to regain synchronous

state:

– The presence of the correct FAS word in frame n.

– The presence of the correct service word (bit 2 = 1) in frame n+1.

– For a second time the presence of a correct FAS word in frame

n+2.

The bit is cleared when synchronization has been regained (directly

after the second correct FAS word of the procedure described above

has been received).

If the CRC-multiframe structure is enabled by setting bit FMR2.RFS1,

multiframe

alignment

assumed

lost

pulseframe

synchronization has been lost. The resynchronization procedure for

multiframe alignment starts after the bit FRS0.LFA has been cleared.

Multiframe alignment has been regained if two consecutive CRC-

multiframes have been received without a framing error (refer to

FRS0.LMFA).

The bit is set during alarm simulation and reset if FMR0.SIM is

cleared and no alarm condition exists.

If bit FRS0.LFA is cleared a loss of frame alignment recovery interrupt

status ISR2.FAR is generated.

RRA

Receive Remote Alarm

Set if bit 3 of the received service word is set. An alarm interrupt status

ISR2.RA can be generated if the alarm condition is detected.

FRS0.RRA is cleared if no alarm is detected. At the same time a

remote alarm recovery interrupt status ISR2.RAR is generated.

The bit RSW.RRA has the same function.

Both status and interrupt status bits are set during alarm simulation.

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