PEB2256HT datasheet(293/490 Pages) INFINEON

Part #	PEB2256HT

Description	E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications

PDF	490 Pages

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Manufacturer	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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293 / 490 page

FALC56 V1.2

PEB 2256

E1 Registers

Data Sheet

293

2002-08-27

NMF

No Multiframe Alignment Found

This bit is only valid if the CRC4 interworking is selected

(FMR2.RFS(1:0) = 11). Set if the multiframe pattern is not detected in

a time interval of 400 ms after the framer has reached the

doubleframe synchronous state. The receiver is then automatically

switched to doubleframe format.

This bit is reset if the basic framing has been lost.

LMFA

Loss of Multiframe Alignment

Not used in doubleframe format (FMR2.RFS1 = 0). In this case LMFA

is set.

In CRC-multiframe mode (FMR2.RFS1 = 1), this bit is set

– if force resynchronization is initiated by setting bit FMR0.FRS, or

– if multiframe force resynchronization is initiated by setting bit

FMR1.MFCS, or

– if pulseframe alignment has been lost (FRS0.LFA).

It is reset if two CRC-multiframes have been received at an interval of

× 2 ms (n = 1, 2, 3 and so forth) without a framing error.

If bit FRS0.LMFA is cleared a loss of multiframe alignment recovery

interrupt status ISR2.MFAR is generated.

PEB2256HT Datasheet(PDF) 293 Page - Infineon Technologies AG