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WM5102 Datasheet(PDF) 37 Page - Wolfson Microelectronics plc |
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WM5102 Datasheet(HTML) 37 Page - Wolfson Microelectronics plc |
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37 / 334 page ![]() Production Data WM5102 w PD, June 2014, Rev 4.2 37 CONTROL INTERFACE TIMING 2-WIRE (I2C) CONTROL MODE Figure 9 Control Interface Timing - 2-wire (I2C) Control Mode Test Conditions The following timing information is valid across the full range of recommended operating conditions. PARAMETER SYMBOL MIN TYP MAX UNIT SCLK Frequency 1000 kHz SCLK Low Pulse-Width t1 500 ns SCLK High Pulse-Width t2 260 ns Hold Time (Start Condition) t3 260 ns Setup Time (Start Condition) t4 260 ns SDA, SCLK Rise Time t6 120 ns SDA, SCLK Fall Time t7 120 ns Setup Time (Stop Condition) t8 260 ns SDA Setup Time (data input) t5 50 ns SDA Hold Time (data input) t9 0 ns SDA Valid Time (data/ACK output) t10 450 ns Pulse width of spikes that will be suppressed tps 0 50 ns |
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