WM5102 datasheet(5/334 Pages) WOLFSON

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Production Data

WM5102

PD, June 2014, Rev 4.2

EXTERNAL ACCESSORY DETECTION ................................................................................ 177

JACK DETECT ............................................................................................................................................................................177

JACK POP SUPPRESSION (MICDET CLAMP)..........................................................................................................................179

MICROPHONE DETECT.............................................................................................................................................................180

HEADPHONE DETECT...............................................................................................................................................................185

LOW POWER SLEEP CONFIGURATION .............................................................................. 189

SLEEP MODE..............................................................................................................................................................................189

SLEEP CONTROL SIGNALS - JD1, GP5, MICDET CLAMP ......................................................................................................192

WAKE-UP TRANSITION .............................................................................................................................................................194

WRITE SEQUENCE CONTROL..................................................................................................................................................195

INTERRUPT CONTROL..............................................................................................................................................................195

GENERAL PURPOSE INPUT / OUTPUT ............................................................................... 196

GPIO CONTROL .........................................................................................................................................................................197

GPIO FUNCTION SELECT .........................................................................................................................................................199

DIGITAL AUDIO INTERFACE FUNCTION (AIFNTXLRCLK) ......................................................................................................202

BUTTON DETECT (GPIO INPUT)...............................................................................................................................................203

LOGIC ‘1’ AND LOGIC ‘0’ OUTPUT (GPIO OUTPUT) ................................................................................................................203

INTERRUPT (IRQ) STATUS OUTPUT........................................................................................................................................203

DSP STATUS FLAG (DSP IRQN) OUTPUT ...............................................................................................................................204

OPCLK AND OPCLK_ASYNC CLOCK OUTPUT .......................................................................................................................204

FREQUENCY LOCKED LOOP (FLL) STATUS OUTPUT ...........................................................................................................205

FREQUENCY LOCKED LOOP (FLL) CLOCK OUTPUT .............................................................................................................206

PULSE WIDTH MODULATION (PWM) SIGNAL OUTPUT .........................................................................................................206

HEADPHONE DETECTION STATUS OUTPUT .........................................................................................................................207

MICROPHONE / ACCESSORY DETECTION STATUS OUTPUT ..............................................................................................207

ASYNCHRONOUS SAMPLE RATE CONVERTER (ASRC) LOCK STATUS OUTPUT .............................................................207

ASYNCHRONOUS SAMPLE RATE CONVERTER (ASRC) CONFIGURATION ERROR STATUS OUTPUT ...........................208

OVER-TEMPERATURE STATUS OUTPUT ...............................................................................................................................208

DYNAMIC RANGE CONTROL (DRC) STATUS OUTPUT ..........................................................................................................208

CONTROL WRITE SEQUENCER STATUS OUTPUT ................................................................................................................209

CONTROL INTERFACE ERROR STATUS OUTPUT .................................................................................................................209

SYSTEM CLOCKS ENABLE STATUS OUTPUT ........................................................................................................................209

CLOCKING ERROR STATUS OUTPUT .....................................................................................................................................210

DIGITAL AUDIO INTERFACE CONFIGURATION ERROR STATUS OUTPUT .........................................................................211

INTERRUPTS .......................................................................................................................... 212

CLOCKING AND SAMPLE RATES ......................................................................................... 224

SYSTEM CLOCKING ..................................................................................................................................................................224

SAMPLE RATE CONTROL .........................................................................................................................................................225

AUTOMATIC SAMPLE RATE DETECTION................................................................................................................................226

SYSCLK AND ASYNCCLK CONTROL .......................................................................................................................................226

MISCELLANEOUS CLOCK CONTROLS ....................................................................................................................................229

BCLK AND LRCLK CONTROL....................................................................................................................................................236

CONTROL INTERFACE CLOCKING ..........................................................................................................................................236

FREQUENCY LOCKED LOOP (FLL) ..........................................................................................................................................237

FREE-RUNNING FLL MODE ......................................................................................................................................................247

SPREAD SPECTRUM FLL CONTROL .......................................................................................................................................248

GPIO OUTPUTS FROM FLL .......................................................................................................................................................249

EXAMPLE FLL CALCULATION...................................................................................................................................................249

EXAMPLE FLL SETTINGS..........................................................................................................................................................250

CONTROL INTERFACE .......................................................................................................... 251

2-WIRE (I2C) CONTROL MODE .................................................................................................................................................252

4-WIRE (SPI) CONTROL MODE.................................................................................................................................................256

CONTROL WRITE SEQUENCER ........................................................................................... 257

INITIATING A SEQUENCE..........................................................................................................................................................257

AUTOMATIC SAMPLE RATE DETECTION SEQUENCES ........................................................................................................258

JACK DETECT, GPIO, MICDET CLAMP, AND WAKE-UP SEQUENCES .................................................................................259

WM5102 Datasheet(PDF) 5 Page - Wolfson Microelectronics plc

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