WM5102 datasheet(14/334 Pages) WOLFSON

14 / 334 page

WM5102

Production Data

PD, June 2014, Rev 4.2

RECOMMENDED OPERATING CONDITIONS

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

Digital supply range (Core)

See notes 3, 5, 6

DCVDD

(≤24.576MHz clocking)

1.14

1.2

1.9

DCVDD

(>24.576MHz clocking)

1.71

1.8

1.9

Digital supply range (I/O)

DBVDD1

1.7

1.9

Digital supply range (I/O)

DBVDD2, DBVDD3

1.7

3.47

LDO supply range

LDOVDD

1.7

1.8

1.9

Charge Pump supply range

CPVDD

1.7

1.8

1.9

Speaker supply range

SPKVDDL, SPKVDDR

2.4

5.5

Analogue supply range

AVDD

1.7

1.8

1.9

Microphone Bias supply

See note 7

MICVDD

2.375

2.5

3.6

Ground

DGND, AGND, CPGND,

SPKGNDL, SPKGNDR

Power supply rise time

See notes 8, 9, 10

All supplies

µs

Operating temperature range

-40

°C

Notes:

The grounds must always be within 0.3V of AGND.

AVDD must be supplied before or simultaneously to DCVDD. DCVDD must not be powered if AVDD is not present. There are

no other power sequencing requirements.

An internal LDO (powered by LDOVDD) can be used to provide the DCVDD supply.

The RESET

¯¯¯¯¯¯ input must be asserted (logic 0) during power-up, and held asserted until after the AVDD, DBVDD1 and DCVDD

supplies are within the recommended operating limits. If DCVDD is powered from the internal LDO, then the RESET

¯¯¯¯¯¯ pin must

be held asserted until at least 1.5ms after the LDO has been enabled.

‘Sleep’ mode is supported when DCVDD is below the limits noted, provided AVDD and DBVDD1 are present.

Under default conditions, digital core clocking rates above 24.576MHz are inhibited. The register-controlled clocking limit

should only be raised when the applicable DCVDD voltage is present.

An internal Charge Pump and LDO (powered by CPVDD) provide the Microphone Bias supply; the MICVDD pin should not be

connected to an external supply.

DCVDD and MICVDD minimum rise times do not apply when these domains are powered using the internal LDOs.

The specified minimum power supply rise times assume a minimum decoupling capacitance of 100nF per pin. However,

Wolfson strongly advises that the recommended decoupling capacitors are present on the PCB and that appropriate layout

guidelines are observed.

10. The specified minimum power supply rise times also assume a maximum PCB inductance of 10nH between decoupling

capacitor and pin.

WM5102 Datasheet(PDF) 14 Page - Wolfson Microelectronics plc

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