WM5102 datasheet(68/334 Pages) WOLFSON

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WM5102

Production Data

PD, June 2014, Rev 4.2

The MICMIX and NOISEMIX control registers (see Figure 28) are located at register addresses R1632

(0660h) through to R1647 (066Fh).

The full list of digital mixer control registers is provided in the “Register Map” section (Register R1600

through to R2920). Generic register definitions are provided in Table 7.

The Mic Mute mixer can be selected as input to any of the digital mixers or signal processing functions

within the WM5102 digital core. The bracketed number (0Ch) in Figure 28 indicates the corresponding

*_SRCn register setting for selection of the Mic Mute mixer as an input to another digital core function.

The sample rate for the Mic Mute mixer and multiplexer is configured using the MICMUTE_RATE

to any signal chain that is asynchronous and/or configured for a different sample rate.

The control registers associated with the Mic Mute mixer function are described in Table 8.

The output of the Mic Mute mixer and multiplexer is enabled using MICMUTE_MIX_ENA.

The multiplexer is controlled using the MICMUTE_NOISE_ENA register bit, selecting MICMIX or

NOISEMIX as the output signal source.

Under recommended operating conditions, the MICMIX output is selected for normal (audio)

conditions, and the NOISEMIX output is selected for mute (or ‘comfort noise’) conditions.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R707

(02C3h)

Mic noise

mix control

MICMUTE_NOIS

E_ENA

Mic Mute Mixer Control

0 = Mic Mix

1 = Noise Mix

MICMUTE_MIX_E

Mic Mute Mixer Enable

0 = Disabled

1 = Enabled

Table 8 Mic Mute Mixer Control Registers

The WM5102 performs automatic checks to confirm that the SYSCLK frequency is high enough to

support the commanded digital mixing functions. If an attempt is made to enable a MICMIX or

NOISEMIX signal path, and there are insufficient SYSCLK cycles to support it, then the attempt will be

unsuccessful. (Note that any signal paths that are already active will not be affected under these

circumstances.)

The Underclocked Error condition can be monitored using the GPIO and/or Interrupt functions. See

“General Purpose Input / Output” and “Interrupts” for further details.

The status bits in Registers R1600 to R2920 indicate the status of each of the digital mixers. If an

Underclocked Error condition occurs, then these bits provide readback of which mixer(s) have been

successfully enabled, and which mixer(s) could not be enabled.

5-BAND PARAMETRIC EQUALISER (EQ)

The digital core provides four EQ processing blocks as illustrated in Figure 29. A 4-input mixer is

associated with each EQ. The 4 input sources are selectable in each case, and independent volume

control is provided for each path. Each EQ block supports 1 output.

The EQ provides selective control of 5 frequency bands as described below.

The low frequency band (Band 1) filter can be configured either as a peak filter or a shelving filter.

When configured as a shelving filter, is provides adjustable gain below the Band 1 cut-off frequency.

As a peak filter, it provides adjustable gain within a defined frequency band that is centred on the

Band 1 frequency.

The mid frequency bands (Band 2, Band 3, Band 4) filters are peak filters, which provide adjustable

gain around the respective centre frequency.

The high frequency band (Band 5) filter is a shelving filter, which provides adjustable gain above the

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