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WM5102 Datasheet(PDF) 47 Page - Wolfson Microelectronics plc |
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WM5102 Datasheet(HTML) 47 Page - Wolfson Microelectronics plc |
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47 / 334 page ![]() Production Data WM5102 w PD, June 2014, Rev 4.2 47 Figure 20 Digital Microphone Input Two digital microphone channels are interleaved on DMICDATn. The digital microphone interface timing is illustrated in Figure 21. Each microphone must tri-state its data output when the other microphone is transmitting. Figure 21 Digital Microphone Interface Timing When digital microphone input is enabled, the WM5102 outputs a clock signal on the applicable DMICCLK pin(s). The DMICCLK frequency is selectable, as described in Table 1. Note that SYSCLK must be present and enabled when using the Digital Microphone inputs; see “Clocking and Sample Rates” for details of SYSCLK and the associated register control fields. |
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