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TMS320DM642 Datasheet(PDF) 132 Page - Texas Instruments |
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TMS320DM642 Datasheet(HTML) 132 Page - Texas Instruments |
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132 / 178 page  www.ti.com Inputs Valid PCLK PCI Input 4 5 1 2 1 3 PCLK PCI Output TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor SPRS200J – JULY 2002 – REVISED AUGUST 2005 Table 5-44. Timing Requirements for PCI Inputs (see Figure 5-48) –600 –500, A-600 –720 NO. UNIT 33 MHz 66 MHz MIN MAX MIN MAX 4 tsu(IV-PCLKH) Setup time, input valid before PCLK high 7 3 ns 5 th(IV-PCLKH) Hold time, input valid after PCLK high 0 0 ns Figure 5-48. PCI Input Timing (33-/66-MHz) Table 5-45. Switching Characteristics Over Recommended Operating Conditions for PCI Outputs (see Figure 5-49) –600 –500, A-600 –720 NO. parameter UNIT 33 MHz 66 MHz MIN MAX MIN MAX 1 td(PCLKH-OV) Delay time, PCLK high to output valid 2 11 2 6 ns 2 td(PCLKH-OLZ) Delay time, PCLK high to output low impedance 2 2 ns 3 td(PCLKH-OHZ) Delay time, PCLK high to output high impedance 28 14 ns Figure 5-49. PCI Output Timing (33-/66-MHz) 132 DM642 Peripheral Information and Electrical Specifications |
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