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TMS320DM642 Datasheet(PDF) 133 Page - Texas Instruments |
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TMS320DM642 Datasheet(HTML) 133 Page - Texas Instruments |
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133 / 178 page ![]() www.ti.com 9 8 7 6 3 2 5 4 1 XSP_CS XSP_CLK XSP_DO XSP_DI TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor SPRS200J – JULY 2002 – REVISED AUGUST 2005 Table 5-46. Timing Requirements for Serial EEPROM Interface (see Figure 5-50) –500 –600 NO. UNIT –720 MIN MAX 8 tsu(DIV-CLKH) Setup time, XSP_DI valid before XSP_CLK high 50 ns 9 th(CLKH-DIV) Hold time, XSP_DI valid after XSP_CLK high 0 ns Table 5-47. Switching Characteristics Over Recommended Operating Conditions for Serial EEPROM Interface (1) (see Figure 5-50) –500 –600 NO. PARAMETER UNIT –720 MIN TYP MAX 1 tw(CSL) Pulse duration, XSP_CS low 4092P ns 2 td(CLKL-CSL) Delay time, XSP_CLK low to XSP_CS low 0 ns 3 td(CSH-CLKH) Delay time, XSP_CS high to XSP_CLK high 2046P ns 4 tw(CLKH) Pulse duration, XSP_CLK high 2046P ns 5 tw(CLKL) Pulse duration, XSP_CLK low 2046P ns 6 tosu(DOV-CLKH) Output setup time, XSP_DO valid before XSP_CLK high 2046P ns 7 toh(CLKH-DOV) Output hold time, XSP_DO valid after XSP_CLK high 2046P ns (1) P = 1/CPU clock frequency in ns. For example, when running parts at 720 MHz, use P = 1.39 ns. Figure 5-50. PCI Serial EEPROM Interface Timing DM642 Peripheral Information and Electrical Specifications 133 |
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