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TMS320DM642 Datasheet(PDF) 135 Page - Texas Instruments |
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TMS320DM642 Datasheet(HTML) 135 Page - Texas Instruments |
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135 / 178 page  www.ti.com TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor SPRS200J – JULY 2002 – REVISED AUGUST 2005 Table 5-49. McBSP 1 Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME COMMENTS The CPU and EDMA controller 0190 0000 DRR1 McBSP1 data receive register via Configuration Bus can only read this register; they cannot write to it. 0x3400 0000 – 0x37FF FFFF DRR1 McBSP1 data receive register via peripheral bus 0190 0004 DXR1 McBSP1 data transmit register via configuration bus 0x3400 0000 – 0x37FF FFFF DXR1 McBSP1 data transmit register via peripheral bus 0190 0008 SPCR1 McBSP1 serial port control register 0190 000C RCR1 McBSP1 receive control register 0190 0010 XCR1 McBSP1 transmit control register 0190 0014 SRGR1 McBSP1 sample rate generator register 0190 0018 MCR1 McBSP1 multichannel control register 0190 001C RCERE01 McBSP1 enhanced receive channel enable register 0 0190 0020 XCERE01 McBSP1 enhanced transmit channel enable register 0 0190 0024 PCR1 McBSP1 pin control register 0190 0028 RCERE11 McBSP1 enhanced receive channel enable register 1 0190 002C XCERE11 McBSP1 enhanced transmit channel enable register 1 0190 0030 RCERE21 McBSP1 enhanced receive channel enable register 2 0190 0034 XCERE21 McBSP1 enhanced transmit channel enable register 2 0190 0038 RCERE31 McBSP1 enhanced receive channel enable register 3 0190 003C XCERE31 McBSP1 enhanced transmit channel enable register 3 0190 0040 – 0193 FFFF – Reserved DM642 Peripheral Information and Electrical Specifications 135 |
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