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DS26401 Datasheet(PDF) 18 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 18 Page - Dallas Semiconductor |
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18 / 309 page ![]() DS26401 Octal T1/E1/J1 Framer 18 Signal Name: RCHBLK/CLK (1–8) Signal Description: Receive Channel Block/Clock Signal Type: Output Pin can be configured to output either RCHBLK or RCHCLK. RCHBLK is a user programmable output that can be forced high or low during any of the 24 T1 or 32 E1 channels. Synchronous with RCLK when the receive side elastic store is disabled. Synchronous with RSYSCLK when the receive-side elastic store is enabled. Useful for blocking clocks to a serial UART or LAPD controller in applications where not all channels are used such as fractional service, 384kbps, service, 768kbps, or ISDN–PRI. Also useful for locating individual channels in drop-and-insert applications, for external per-channel loopback, and for per-channel conditioning. RCHCLK is a 192 kHz (T1) or 256kHz (E1) clock that pulses high during the LSB of each channel. Can also be programmed to output a gated bit clock useful for fractional services. Synchronous with RCLK when the receive side elastic store is disabled. Synchronous with RSYSCLK when the receive side elastic store is enabled. Useful for parallel-to-serial conversion of channel data. Signal Name: RLOF/LOTC (1–8) Signal Description: Receive Loss of Frame/Loss of Transmit Clock Signal Type: Output A dual function output that is controlled by the GCR1.5 control bit. This pin can be programmed to either toggle high when the synchronizer is searching for the frame and multiframe or to toggle high if the TCLK pin has not been toggled for approximately three clock periods. Signal Name: RLOS/RSIGF (1–8) Signal Description: Receive Loss of Signal/Receive Signaling Freeze Signal Type: Output A dual function output that is controlled by the GCR2.3 control bit. This pin can be programmed to toggle high when the framer detects a loss of signal condition, or when the signaling data is frozen via either automatic or manual intervention. Used to alert downstream equipment of the condition. Signal Name: RF/RMSYNC (1–8) Signal Description: Receive Frame Sync/Receive Multiframe Sync Signal Type: Output A dual function output controlled by the GCR2.2 control bit. RFSYNC is an extracted 8kHz pulse, one RCLK wide that identifies frame boundaries. RMSYNC is an extracted pulse, one RCLK wide (elastic store disabled) or one RSYSCLK wide (elastic store enabled), which identifies multiframe boundaries. When the receive elastic store is enabled, the RMSYNC signal indicates the multiframe sync on the system (backplane) side of the e-store. In E1 mode, will indicate either the CRC4 or CAS multiframe as determined by the RSMS2 control bit at RIOCR.1 |
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