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DS26401 Datasheet(PDF) 25 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 25 Page - Dallas Semiconductor |
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25 / 309 page ![]() DS26401 Octal T1/E1/J1 Framer 25 7.2 Global Register Description and Operation Register Name: GCR1 Register Description: Global Control Register 1 Register Address: 0F0h Bit # 7 6 5 4 3 2 1 0 Name BBEDIM BLOSIM RLOFLTS GIBO REFCLKS BWE GCLE GIPI Default 0 0 0 0 0 0 0 0 Bit 0 / Global Interrupt Pin Inhibit (GIPI) 0 = Normal operation (interrupt pin (INT) toggles low on an unmasked interrupt condition) 1 = Interrupt inhibit (interrupt pin (INT) is forced high (inactive) when this bit is set) Bit 1 / Global Counter Latch Enable (GCLE). A low-to-high transition on this bit, when enabled, latches the framer performance-monitor counters and the internal BERT counters. Each framer can be independently enabled to accept this input, as well as the BERT. This bit must be cleared and set again to perform another counter latch. Bit 2 / Bulk Write Enable (BWE). When this bit is set, a port write to one of the octal ports is mapped into all 8 ports. This bit is useful for device initialization. It must be cleared before performing a read operation. 0 = Normal operation 1 = Bulk write is enabled Bit 3 / Reference Clock-Frequency Select (REFCLKS). This bit sets the divider ratio of the internal clock generator depending on the frequency of the reference clock input. 0 = REF_CLK is 1.544MHz 1 = REF_CLK is 2.048MHz Bit 4 / Ganged IBO Enable (GIBO). This bit is used to select either the internal mux for IBO operation or externally wire-OR operation. Normally this bit should be set = 0 and the internal mux is used. 0 = Use internal IBO mux 1 = Externally wire-OR TSERs and RSERs for IBO operation Bit 5 / Receive Loss-of-Frame/Loss-of-Transmit Clock-Indication Select (RLOFLTS) 0 = RLOF/LOTCx pins indicate receive loss-of-frame 1 = RLOF/LOTCx pins indicate loss-of-transmit clock Bit 6 / BERT Loss-of-Sync Interrupt Mask (BLOSIM) 0 = DS26401 does not generate an interrupt on INT for a BERT LOS 1 = DS26401 generates an interrupt on INT for a BERT LOS Bit 7 / BERT Bit-Error-Detect Interrupt Mask (BBEDIM) 0 = DS26401 does not generate an interrupt on INT for a BERT bit-error detect 1 = DS26401 generates an interrupt on INT for a BERT bit-error detect |
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