DS26401 datasheet(48/309 Pages) DALLAS

48 / 309 page

DS26401 Octal T1/E1/J1 Framer

Normally, this loopback is only enabled when ESF framing is being performed, but it can also be enabled in D4

framing applications. In a PLB situation, the DS26401 loops the 192 bits of payload data (with BPVs corrected) from

the receive section back to the transmit section. The FPS framing pattern, CRC6 calculation, and the FDL bits are

not looped back, they are reinserted by the DS26401.

Bit 2 / Remote Loopback (RLB)

0 = loopback disabled

1 = loopback enabled

In this loopback, data input through the RPOS and RNEG pins is transmitted back to the TPOS and TNEG pins.

Data continues to pass through the DS26401’s receive-side framer as it would normally, and the data from the

transmit-side formatter is ignored.

Bits 3, 4, 6 / Unused. Must be set = 0 for proper operation.

Bit 5 / RSER Control (RSERC)

0 = Allow RSER to output data as received under all conditions (normal operation)

1 = Force RSER to one under loss-of-frame alignment conditions

Bit 7 / Input Data Format (IDF)

0 = Bipolar data is expected at RPOS and RNEG (either AMI or B8ZS).

1 = NRZ data is expected at RPOS. The BPV counter is disabled and RNEG is ignored by the DS26401.

REMOTE LOOPBACK

RECEIVE

FRAMER

TRANSMIT

FRAMER

BACKPLANE

I/F

BACKPLANE

I/F

RSER

TSER

TPOS

TNEG

RPOS

RNEG

DS26401 Datasheet(PDF) 48 Page - Dallas Semiconductor