DS26401 datasheet(37/309 Pages) DALLAS

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DS26401 Octal T1/E1/J1 Framer

GSR2

Global Status Register 2

0FAh

Bit #

Name

—

BBED

BLOS

Default

Bit 0 / BERT Loss-of-Sync Interrupt Status (BLOS)

0 = The BERT has not issued an interrupt for LOS

1 = The BERT has issued an interrupt for LOS (only possible when BLOSIM in GCR1 is set)

Bit 1 / BERT Bit-Error-Detect Interrupt Status (BBED)

0 = The BERT has not issued an interrupt for BED

1 = The BERT has issued an interrupt for BED (only possible when BBEDIM in GCR1 is set)

Bits 2–7 / Unused

7.4 Interrupt Tree

When the host processor detects an interrupt, the user can first read the GSR1 and GSR2 registers to narrow down

the potential source of the interrupt event. Bit locations set in the GSR1 register direct the user to one or more

framers, from where the appropriate status register(s) can be discerned with RIIR and TIIR.

FIS8 FIS7 FIS6 FIS5 FIS4 FIS3 FIS2 FIS1

GSR1 (0F9h)

RIIR (09Fh)

RLS1

TIIR (19Fh)

TLS2 TLS1

E9Fh

F9Fh

Framer for Port #1 (A11:A9 = 000b)

To Framer(n) Latched Status Registers

INTERRUPT

BLOS

BBED

BSR (2F4h)

GSR2 (0FAh)

C9Fh

D9Fh

A9Fh

B9Fh

89Fh

99Fh

69Fh

79Fh

49Fh

59Fh

29Fh

39Fh

—

RLS2

RLS3

RLS4

RLS5

RLS6

RLS7

NOTE: RLS2 IS NOT USED IN T1 MODE; RLS7 IS NOT USED IN E1 MODE.

DS26401 Datasheet(PDF) 37 Page - Dallas Semiconductor

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