DS26401 datasheet(49/309 Pages) DALLAS

49 / 309 page

DS26401 Octal T1/E1/J1 Framer

RIOCR

Receive I/O Configuration Register

084h + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

RCLKINV

RSYNCINV

H100EN

RSCLKM

RSMS

RSIO

RSMS2

RSMS1

Default

Bit 0 / RSYNC Mode Select 1 (RSMS1).

Selects frame or multiframe pulse when RSYNC pin is in output mode. In

input mode (elastic store must be enabled) multiframe mode is only useful when receive signaling reinsertion is

enabled.

0 = frame mode

1 = multiframe mode

Bit 1 / RSYNC Mode Select 2 (RSMS2)

T1:

RSYNC pin must be programmed in the output frame mode

0 = do not pulse double wide in signaling frames

1 = do pulse double wide in signaling frames

E1:

RSYNC pin must be programmed in the output multiframe mode

0 = RSYNC outputs CAS multiframe boundaries

1 = RSYNC outputs CRC4 multiframe boundaries

Bit 2 / RSYNC I/O Select (RSIO).

(Note: This bit must be set to zero when elastic store is disabled)

0 = RSYNC is an output

1 = RSYNC is an input (only valid if elastic store enabled)

Bit 3 / RSYNC Multiframe Skip Control (RSMS).

This bit is useful in framing format conversions from D4 to ESF.

This function is not available when the receive-side elastic store is enabled. RSYNC must be set to output

multiframe pulses.

0 = RSYNC outputs a pulse at every multiframe.

1 = RSYNC outputs a pulse at every other multiframe.

Bit 4 / RSYSCLK Mode Select (RSCLKM)

0 = if RSYSCLK is 1.544MHz

1 = if RSYSCLK is 2.048MHz or IBO enabled

Bit 5 / H.100 SYNC Mode (H100EN).

See additional details in Section 8.6.

0 = Normal operation

1 = RSYNC and TSSYNC signals are shifted.

Bit 6 / RSYNC Invert (RSYNCINV)

0 = No inversion

1 = Invert RSYNC output

Bit 7 / RCLK Invert (RCLKINV)

0 = No inversion

1 = Invert RCLK as input

DS26401 Datasheet(PDF) 49 Page - Dallas Semiconductor

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