DS26401 datasheet(45/309 Pages) DALLAS

45 / 309 page

DS26401 Octal T1/E1/J1 Framer

8.5 T1 Receive Control Registers

These registers provide the primary setup and control of the receive framers.

RCR1

Receive Control Register 1

081h + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

SYNCT

RB8ZS

RFM

ARC

SYNCC

RJC

SYNCE

RESYNC

Default

Bit 0 / Resynchronize (RESYNC).

When toggled from low to high, a resynchronization of the receive-side framer is

initiated. Must be cleared and set again for a subsequent resync.

Bit 1 / Sync Enable (SYNCE)

0 = auto resync enabled

1 = auto resync disabled

Bit 2 / Receive Japanese CRC6 Enable (RJC)

0 = use ANSI/AT&T/ITU CRC6 calculation (normal operation)

1 = use Japanese standard JT-G704 CRC6 calculation

Bit 3 / Sync Criteria (SYNCC)

In D4 Framing Mode:

0 = search for Ft pattern, then search for Fs pattern

1 = cross couple Ft and Fs pattern

In ESF Framing Mode:

0 = search for FPS pattern only

1 = search for FPS and verify with CRC6

Bit 4 / Auto Resync Criteria (ARC)

0 = Resync on OOF or LOS event

1 = Resync on OOF only

Bit 5 / Receive Frame Mode Select (RFM)

0 = ESF framing mode

1 = D4 framing mode

Bit 6 / Receive B8ZS Enable (RB8ZS)

0 = B8ZS disabled

1 = B8ZS enabled

Bit 7 / Sync Time (SYNCT)

0 = qualify 10 bits

1 = qualify 24 bits

DS26401 Datasheet(PDF) 45 Page - Dallas Semiconductor

DS26401 Datasheet(HTML) 45 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL