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TDA2EX Datasheet(PDF) 108 Page - Texas Instruments |
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TDA2EX Datasheet(HTML) 108 Page - Texas Instruments |
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108 / 391 page  108 TDA2EG-17 SPRS969B – AUGUST 2016 – REVISED JUNE 2017 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2EG-17 Specifications Copyright © 2016–2017, Texas Instruments Incorporated Table 5-5. Maximum Supported Frequency (continued) Module Clock Sources Instance Name Input Clock Name Clock Type Max. Clock Allowed (MHz) PRCM Clock Name PLL / OSC / Source Clock Name PLL / OSC / Source Name DLL_AGING FCLK Int 38.4 EMIF_DLL_FC LK L3INSTR_DLL_AGING _GCLK SYS_CLK1 OSC1 DPLL_ABE_X2_CL K DPLL_ABE DMM DMM_CLK Int 266 EMIF_L3_GICLK CORE_X2_CLK DPLL_CORE DPLL_DEBUG SYSCLK Int 38.4 EMU_SYS_CLK SYS_CLK1 OSC1 DSP1 DSP1_FICLK Int & Func DSP_CLK DSP1_GFCLK DSP_GFCLK DPLL_DSP DSS DSS_HDMI_CEC_CL K Func 0.032 HDMI_CEC_GFCLK SYS_CLK1/610 OSC1 DSS_HDMI_PHY_CL K Func 48 HDMI_PHY_GFCLK FUNC_192M_CLK DPLL_PER DSS_CLK Func 192 DSS_GFCLK DSS_CLK DPLL_PER HDMI_CLKINP Func 38.4 HDMI_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 DSS_L3_ICLK Int 266 DSS_L3_GICLK CORE_X2_CLK DPLL_CORE VIDEO1_CLKINP Func 38.4 VIDEO1_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 VIDEO2_CLKINP Func 38.4 VIDEO2_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 DPLL_DSI1_A_CLK1 Func 209.3 N/A HDMI_CLK DPLL_HDMI VIDEO1_CLKOUT 1 DPLL_VIDEO1 DPLL_DSI1_B_CLK1 Func 209.3 N/A VIDEO1_CLKOUT 3 DPLL_VIDEO1 HDMI_CLK DPLL_HDMI DPLL_ABE_X2_CL K DPLL_ABE DPLL_DSI1_C_CLK1 Func 209.3 N/A HDMI_CLK DPLL_HDMI VIDEO1_CLKOUT 3 DPLL_VIDEO1 DPLL_HDMI_CLK1 Func 185.6 N/A HDMI_CLK DPLL_HDMI DSS DISPC LCD1_CLK Func 209.3 N/A DPLL_DSI1_A_CL K1 See DSS data in the rows above DSS_CLK LCD2_CLK Func 209.3 N/A DPLL_DSI1_B_CL K1 DSS_CLK LCD3_CLK Func 209.3 N/A DPLL_DSI1_C_CL K1 DSS_CLK F_CLK Func 209.3 N/A DPLL_DSI1_A_CL K1 DPLL_DSI1_B_CL K1 DPLL_DSI1_C_CL K1 DSS_CLK DPLL_HDMI_CLK1 |
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